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2022-09-24 13:04:29
How to understand FET By chip
Is the rated current of the FET just the current that fuses the FET?
no. It should only be regarded as a nominal specification, and how large the current flowing through the FET is and when it will be blown are detailed in the FET product standard, and vary depending on the standard. Regulations vary. The FET has a fusing coefficient whose value is greater than 1 (usually between 1.1 and 1.5), which is the ratio of the conventional non-fusing current to the rated current. It can be seen from this that even if the current flowing through the FET is greater than its rated current and does not exceed the conventional non-fuse current, the FET should not be blown.
What is the slow-break FET?
The slow-break FET is also called a delay FET. Its delay characteristic is that when the circuit has a non-fault pulse current, it can remain intact and can provide protection for long-term overload. In some circuits, the current at the moment of switching is greater than several times the normal operating current. Although the peak value of this current is very high, it appears for a short time. We call it pulse current or surge current. Ordinary FETs cannot withstand this current. If ordinary FETs are used in such circuits, they may not be able to boot normally. If larger FETs are used, then the circuit will have to be overloaded. to protection. The melt of the delay field effect tube is specially processed. It has the function of absorbing energy. Adjusting the amount of energy absorption can make it not only resist the impact current but also provide protection against overload.
What does the breaking capacity of the FET mean?
When a current between the conventional non-fuse current and the rated breaking capacity (current) specified in the relevant standard acts on the FET, the FET should operate satisfactorily without endangering the surrounding environment. The expected fault current of the circuit in which the FET is placed must be less than the rated breaking capacity current specified in the standard, otherwise, when the FET is fused, there will be continuous arcing, ignition, burning of the FET, and melting together with the contacts. , FET marks cannot be recognized, etc. Of course, the breaking capacity of inferior FETs cannot meet the requirements of the standard, and the above hazards will also occur during use.
What is the significance of studying the temperature rise of FETs?
The temperature rise of the FET refers to the temperature rise value of the FET when a specified current flows through the FET, that is, the value of the measured temperature minus the ambient temperature. The IEC standard specifies its upper limit at 135°C, and the UL standard specifies its upper limit at 75°C. Because the melt of the FET is more sensitive to temperature, under the action of a certain temperature for a long time, its melting point and impedance will change, and this change will affect the accuracy of the FET. This is commonly referred to as FET aging. It is very dangerous to use aging FETs in circuits, so we should pay attention to the temperature rise of FETs when making and using FETs. In the same way, we should also note that even if the FET has not been blown after being used for a long time, it may have aged and should be replaced at this time.
What does the voltage drop of the FET indicate?
The voltage drop of the FET is the voltage drop across the FET under rated current conditions. It reflects the internal resistance of the FET, and its value should not be too large. If a FET with excessive internal resistance (voltage drop) is installed in the circuit, it will affect the system parameters of the circuit, making the circuit unable to work normally. The standard has not only the upper limit of the value of the voltage drop, but also its consistency.
How to understand the rated voltage of the FET?
Whether the FET is blown or not depends on the magnitude of the current flowing through it, and has nothing to do with the working voltage of the circuit. The rated voltage of the FET is proposed from the perspective of safe use of the FET, which is the working voltage of the circuit where the FET is in a safe working state. This shows that the FET can only be placed in a circuit whose working voltage is less than or equal to the rated voltage of the FET. Only in this way can the FET work safely and effectively, otherwise, there will be continuous arcing and voltage breakdown when the FET is blown, which will endanger the circuit.
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