*ARM 32-bit Cortex? M3CPU core

–72MHz max frequency, 1.25dmips/MHz (dhrystone2.1) 0 wait state memory access performance

– Single cycle multiply and hardware divide

*Memories

– 64 or 128 kilobytes of flash memory

– 20 Kbytes SRAM

*Clock, reset and supply management

–2.0 to 3.6V application power and I/O

– POR, PDR and programmable voltage

Detector (PVD)

–4 to 16 MHz crystal oscillator

– Internal 8 MHz factory trimmed RC

– Internal 40kHzRC

– PLL for CPU clock

– 32kHz oscillator for calibrated RTC

*Low power

– Hibernate, Stop and Standby modes

– VBAT power supply for RTC and backup registers

2x12 bit, 1SA/D converter (up to 16

aisle)

– Conversion range: 0 to 3.6V

– Dual sample and hold capability

-Temperature Sensor

*DMA

– 7-channel DMA controller

- Supported peripherals: timer, ADC, SPI,

I

2CS and USAT

*Up to 80 fast I/O ports

– 26/37/51/80 I/O, all mappable to 16 external interrupt vectors, almost all 5V fault tolerant

* debug mode

- Serial Wire Debug (SWD) and JTAG

interface

*7 timers

– Three 16-bit timers, up to 4 each

IC/OC/PWM or pulse counter

Quadrature (incremental) encoder input

– 16-bit, motor control PWM timer with dead time

Power Generation and Emergency Stop

– 2 watchdog timers (independent and

window

– Systick timer 24-bit down counter

*Up to 9 communication interfaces

- Up to 2 I2C interfaces (smbus/pmbus)

– Up to 3 USARTs (ISO7816 interface, LIN,

IrDA function, modem control)

– Up to 2 SPIs (18Mbit/s)

–CAN interface (2.0B activated)

–USB2.0 full speed interface

*CRC calculation unit, 96-bit unique ID

The package is EcoPack