AD8421 is 3 nv/√H...

  • 2022-09-16 16:00:09

AD8421 is 3 nv/√Hz, a low -power instrument amplifier

Features

Low power

2.3 MA maximum power supply current

low noise

3.2 nv/√Hz 1 kHz's maximum input voltage noise noise noise noise

1 kHz is 200 FA/√Hz current noise

Excellent communication specifications

10 MHz bandwidth (G 1)

2 MHz bandwidth (G 100)

0.6 μs precipitation time to 0.001%(g 10)

80 decibels (RR 20 kilowatt)

35 v/μs conversion Rate

High -precision DC performance (

AD8421 BRZ) The smalle Movement voltage drift

1 ppm/° C maximum gain drift (G 1)

500Pa maximum input bias current

from 40 V to the protection input of power supply [123 ]

± 2.5 V to ± 18 V dual power supply (5 V to 36 V single power supply)

Single resistance gain setting (G 1 to 10000)

Application

[ 123] Medical Device

Precision data collection

Microphone front release large

Vibration analysis

Multi -road input application

ADC drive [ 123]

General description

AD8421 is a low -cost, low power consumption, extremely low noise, ultra -low bias current, high -speed instrument amplifier, which is very suitable for extensive signal adjustment and data collection applications. The product has a high co -model suppression ratio, so that it can extract low -level signals under the existence of high -frequency co -modular noise within a wide temperature range.

10 MHz bandwidth, 35 V/μS conversion rate and 0.6 μs stability time to 0.001%(g 10) allowed AD8421 to amplify the high -speed signal, and in applications that need high channels and multi -road reuse systems, Outstanding. Even at a higher gain, the current feedback structure remains high performance; for example, at G 100, the bandwidth is 2MHz and the stable time is 0.8 μs. AD8421 has excellent distortion performance and is suitable for high applications such as vibration analysis.

AD8421 provides 3NV/√Hz input voltage noise and 200FA/√Hz current noise, static current is only 2mA, which is an ideal choice for measuring low level signals. For the application of high -source impedance, AD8421 uses innovative workersArt technology and design technology to provide noise performance restricted by sensors.

AD8421 uses unique protection methods to ensure stable input and still maintain very low noise. This protection allows to enter a voltage of up to 40 V from the opposite power rail without damaging parts.

A resistor sets the gain between 1 to 10,000. The reference pin can be used to apply accurate offset to the output voltage.

The temperature range of AD8421 is 40 ° C to+85 ° C, and has a typical performance curve of 125 ° C. It has 8 -line MSOP and SOIC packaging.

pin connection figure

Absolute maximum rated value

1. For the voltage that exceeds these restrictions, use the input protection resistor. For more information, please refer to the theoretical part of the operation.

2. From the reference to input to each power supply, there is an ESD protective diode, so the REF cannot drive to the power supply in the same way as+in and in can. For details, see the reference terminal part.

The stress that exceeds the absolute maximum rated value may cause permanent damage to the device. This is just a stress rated value; it does not imply that the device's functional operations described in the operation part of this specification or any other conditions. Long -term exposure to absolute maximum rated conditions may affect the reliability of the device.

Thermal resistance

θJa refers to a device that uses 4 layers of JEDEC printing circuit board (PCB) in free air.

Typical performance features

TA 25 ° C, vs ± 15 v, vREF 0 V, RL 2 kΩ, unless there is another explanation of another explanation Essence

]

Operation theory Architecture AD8421 based Topology. There are two stages of this topology: a front amplifier provides a differential amplification, and then a differential amplifier to eliminate the covarurative voltage. Figure 61 shows the simplified schematic diagram of AD8421. On the topology, Q1, A1, R1 and Q2, A2, R2 can be regarded as a precision current feedback amplifier. Enter the transistor Q1 and Q2 to fixed current bias, so any input signal will force A1 and A2The output voltage changes accordingly. Differential signals applied to the input end are copied on the RG pin. Any current through RG will also flow through R1 and R2, generate a differential voltage between nodes 1 and node 2. The amplified differential and the co -mode signal were applied to the differential amplifier. Differential amplifiers use innovative technology, which can produce very low output errors, such as offset voltage and drift, distortion under various loads, and output noise. Laser fine -tuning resistance allows high -precision amplifiers to gain an error of less than 0.01%, and the co -model suppression ratio exceeds 94 decibels (G 1). High -performance lead and special attention to design and layout make it can achieve high CMRR performance within a wider frequency and temperature range. AD8421 uses Superbeta input transistor and bias current compensation, providing extremely high input impedance, low bias current, low bias current, low current noise, and extremely low voltage of 3 nv/√Hz. noise. The current limit and overvoltage protection solution allows the input to enter the opposite track of 40 volts without damage the noise performance. The transmission function of AD8421 is:

The user can easily and accurately set the gain using a standard resistance.

gain selection

Place a resistor on the RG terminal and set the gain of AD8421. Can refer to Table 6 or use the following gain equations Calculating gain:

When there is no gain resistance, AD8421 defaults to G 1. In order to determine the total gain accuracy of the system, the tolerance and gain drift of the RG resistance are added to the specifications of AD8421. When not using gain resistance, the gain error and gain drift are the least.

RG power consumption

AD8421 copy the differential voltage of its input end to the RG resistor. Choose a RG resistance size enough to deal with the expected power consumption at ambient temperature.

Reference terminal

The output voltage of AD8421 is determined according to the potential on the reference terminal. This can be used for grounding at the sensing load, thereby using CMRR to inhibit ground noise or introduce accurate offsets to the signal on the output end. For example, a voltage source can be connected to the REF tube foot at a level off -output to allow AD8421 to drive the single power supply ADC. The REF pin is protected by the ESD diode and must not exceed+vs or VS exceeds 0.3 V.

In order to obtain the best performance, the source impedance of the REF terminal is less than 1Ω. As shown in Figure 61, the reference terminal Ref is at the end of the 10 kΩ resistor. Ref terminal additional resistanceThe resistance increased to 10 kΩ resistance and caused signal amplification connected to the positive input. The quarantine rate of additional RREF can be calculated as follows:

Only the positive signal channel is amplified, and the negative pathway is not affected. This uneven release reduces the co -mode suppression ratio.

The input voltage range

The 3rd op amp architecture of AD8421 Before removing the co -mode voltage of the differential amplifier level, the first level of application gain. Internal nodes between the first and second levels (nodes 1 and node 2 in Figure 61) have gone through a combination of obtaining signals, co -mode signals, and diodes. The voltage supply can limit the combination signal, even if the input and output signals are not restricted. Figure 10 to 13 shows this limit in detail.

Layout

In order to ensure the best performance of AD8421 at the PCB level, you must be careful when designing board layout. The pin of AD8421 is arranged logically to help complete this task.

Common model suppression ratio

Poor layout will cause some co -mode signals to be converted into differential signals before reaching the amplifier. This conversion occurs when the frequency response of one input path is different from another. In order to maintain high co -mode suppression ratio, closely match the input source impedance and capacitance of each path. Place additional source resistance near the input path of the input path (for example, input protection resistance) near the input path of the input amplifier to minimize the interaction between the resistance and the PCB line parasitic capacitor.

Parasitic capacitors at the gain setting pin (RG) will also affect the frequency of CMRR. If the circuit board design has an element at the gain setting pin (for example, switch or jump line), select the parasitic capacitance as small as possible.

Power and ground

Use a stable DC voltage to power the instrument amplifier. The noise on the power pins will adversely affect the performance.

Place 0.1 μF capacitors at the position closer as close to each power. Because the length of the barrier container is important to high frequency, it is recommended to use the surface sticker capacitor. Any parasitic inductance in the bypass trajectory will play a role in the low impedance generated by bypass capacitors. As shown in Figure 64, 10 μF capacitors can be used far from the device. For these high -value capacitors that are effective at lower frequencies, the distance between the current back path is not so important. In most cases, 10 μF capacitors can be shared by other local precision.

The ground layer helps reduce the parasitic inductance, thereby lowering the voltage when the current changes to the minimum. The area of u200bu200bthe current path is proportional to the size of the parasitic inductance. Therefore, under high frequency, the impedance of the path is also proportional. Induction decoupled path or grounding circuitThe large changes in the current will have an unnecessary effect, because these changes will be coupled to the amplifier input terminal.

Since the load current comes from the power supply, the load should be connected to the same physical location as the bypass capacitor.

Reference sales

The output voltage of AD8421 is determined according to the potential on the reference terminal. Make sure that the REF is connected to the appropriate local ground.

Input bias current circuit

The input bias current of AD8421 must have ground circuits. When using a floating source (such as armocouple) with no current back path, a current return path is created, as shown in Figure 65.

Input voltage outside the power rail

AD8421 has a very powerful input. It usually does not require additional input protection, as shown in Figure 66.

The input of AD8421 is limited by the current; therefore, the input voltage can be as high as 40 volts, from the opposite power rail, no input protection requires all gains at all. For example, if+vs +5 v and vs 8 V, parts can be safely tolerated 35 V to +32 V.

The remaining AD8421 terminals should be retained in the power supply. All terminals of AD8421 have anti -static protection.

The input voltage exceeds the maximum rated value

For applications that the voltage encountered in AD8421 exceeds the limit of the absolute maximum rated value table, external protection is required. This external protection depends on the duration of the overvoltage and the required noise performance.

Metal protectors (such as all short -term events need metal oxide protectors).

For a longer event, use the resistance series input to combine the diode. In order to avoid reducing the bias current performance, it is recommended to use a low leak diode, such as BAV199 or FJH1100. The diode prevents the voltage of the amplifier input exceed the maximum rated value, and the resistor limits the current of the diode. Because most external diode can easily handle 100 mAh or larger, and the resistance value is not large, the impact on noise performance is minimal.

At the cost of certain noise performance, another solution is to use series resistors. In the case of overvoltage, the current entering the AD8421 input is limited by internal restrictions. Although the AD8421 input must be maintained within the limit defined in the absolute maximum rated value, the maximum voltage that the system can withstand is increased by protecting the I × R voltage drop of the resistance of the resistor, as shown in:

For for Positive input signal

For negative input signals

Overvoltage performance is shown in Figures 14, Figure 15, Figure 16 and Figure 17. AD8421 input can withstand at least 40 mAh a day at at room temperature. At this time, the entire service life of the device is accumulated. If long -term overvoltage is expected, external protection is recommended. Under extreme input conditions, the output of the amplifier may reverse.

RF interference (RFI)

When the amplifier is used for the application with a strong RF signal, RF rectification is often a problem. If the amplifier is connected to the signal source, the signal source requires a long lead or PCB trace line, the problem will increase. Interference can be manifested as DC offset voltage or pulse string.

The high -frequency signal can be filtered with a low -pass filter network at the input end of the input end of the instrument, as shown in Figure 68.

The selection of resistance and capacitance values u200bu200bdepends on the ideal balance between noise, high -frequency input impedance, co -mode suppression ratio, signal bandwidth, and radio frequency interference. The RC network also limits differential molds and co -module bandwidth, as shown in the following formula:

Among them, CD ≥ 10 CC.

CD affects the differential signal, CC affects the common mode signal. The non -matching between the R × CC and the R × CC of the negative input reduced the CMRR of AD8421. By using a magnitude larger CD value than CC, the impact of the loss of the loss near the deadline is improved, and the performance of the CMRR is improved.

In order to achieve low -noise and sufficient radio frequency interference filtering, it is recommended to use a till iron oxygen magnetic bead. The iron oxygen magnetic bead increases its impedance frequency, so that the signal of interest is not affected, while preventing radio frequency interference to the amplifier. They also help eliminate the needs of large resistance in the filter, so as to minimize the input reference noise of the system. Selecting the appropriate iron oxygen beads and capacitance values u200bu200bis a function of interference frequency, input drawing length, and radio frequency power.

In order to get the best results, the RFI filter network is as close to the amplifier as possible. Layout is the key to ensure that the radio frequency signal does not pick up the recorder behind the filter. If the radio frequency interference is too strong and cannot be fully filtered, it is recommended to use the shield.

The resistor used for RFI filters can be the same as the resistor for input protection.

Calculate the input level noise

The total noise of the front end of the amplifier depends on the 3.2 nv/√Hz specification in this data table. The three main factors of noise are: source resistance, voltage noise of the instrument amplifier, and current noise of the instrument amplifier.

In the following calculations, noise refers to the input (RTI). In other words, all noise sources are calculated by the source of the source to appear at the amplifier input terminal. To calculate the noise of the amplifier output (RTO), take the RTI noise to the gain of the meter amplifier.

Source resistance noise

Any sensor connected to AD8421 has some output resistance. The resistance can also be connected in series to prevent over -pressure or radio frequency interference. The combination resistance is registered in FIG. 69 is R1 and R2. No matter how good it is manufactured, any resistor has its inherent noise level. This noise is proportional to the square root of the resistance value. At room temperature, this value is about 4nv/√Hz √ √ (the resistance unit is KΩ).

For example, assuming the combination resistance of the sensor and protection at the positive input end is 4 kΩ, and the negative input terminal is 1 kΩ. The total noise of the input resistance is:

The voltage noise of the instrument amplifier

The voltage noise of the instrument amplifier is calculated with three parameters: device output noise, input noise input noise And R resistance noise. The calculation is as follows:

For example, when the gain is 100, the gain resistance is 100Ω. Therefore, the voltage noise of the input amplifier is:

Instrument amplifier current noise

The current noise is converted from source resistance to voltage. The effect of current noise can be calculated by multiplied by the specified current noise of the amplifier by source resistance.

For example, if the R1 source resistance in Figure 69 is 4 kΩ and the R2 source resistance is 1 kΩ, the total impact of the current noise is as follows:

Calculation of total noise density

In order to determine the total noise of the input terminal placing large, the contribution of square and method -binding source resistance noise, voltage noise and current noise.

For example, if the R1 source resistance in FIG. 69 is 4kΩ, the R2 source resistance is 1kΩ, and the gain of the AMP is 100, the total noise of the input is:

Application information

Differential output configuration

Figure 70 shows how to configure AD8421 for differential output AD8421.

Differential output voltage is set by the following formal formula:

Common mode output setting from the following formal setting:

The advantage of the circuit is that the DC differential accuracy depends on AD8421, not an operational amplifier or resistor. In addition, the circuit uses AD8421 to accurately control its output voltage relative to the benchmark voltage.

Although the DC performance and resistance matching of the computing amplifier will affect the DC co -mode output accuracy, this error is likely to be rejected by the next device in the signal chain.The impact of system accuracy is small.

Due to the influence of unstable factors of this circuit, a capacitor is used to limit the effective bandwidth of the computing amplifier. If the amplifier is paired stable, this capacitor can be omitted.

The opening gain and phase of any amplifier may change with the changes in the process and temperature. The additional phase lag can be introduced through the resistance or capacitor load. In order to ensure stability, the values u200bu200bof the capacitor in Figure 70 should be determined by evaluating the small signal pulse response of the load in the extreme values u200bu200bof the output dynamic range at the output dynamic range.

The ambient temperature should also change within the expected range to evaluate its impact on stability. Because the response of the AD8421 output amplifier is faster than the operational amplifier, after the circuit is tuned, the voltage of+OUT may still have some overwhelming. 12 PF capacitor is a good starting point.

In order to obtain the best large signal communication performance, the AD8421 performance of 35 V/μs was matched with an operational amplifier with a high conversion rate. High -bandwidth is not necessary, because the system bandwidth is limited by RC feedback. AD8610, ADA4627-1, AD8510 and ADA4898-1 are some good calculation amplifiers.

Drive ADC

AB output level, low noise and low distortion, high bandwidth and high conversion rate make AD8421 a data collection of data collection at front -end gain, high -co -model suppression ratio and DC accuracy The good choice to drive ADC in the system. Figure 71 shows AD8421. Under a 10 -fold gain configuration, it drives AD7685, a 16 -bit, and 250KSPS pseudo -difference SAR ADC. There are many uses for RC low -pass filters between AD8421 and AD7685. It will overload the amplifier output from the dynamic ADC input, reduce the noise bandwidth of the amplifier, and provide overload protection for the AD7685 analog input. Filter deadline can be determined according to experience. In order to obtain the optimal communication performance, the impedance amplitude is greater than 1 kΩ at the maximum input signal frequency, and the filter is set to stabilize to u0026#189; LSB within a sampling cycle to achieve a full -scale jump. For other precautions, see the data table used by the ADC.

In the configuration of 10 gains, AD8421 has a voltage noise RTI of about 8 nv/√Hz (see the noise part of the input level). The front -end gain increases the sensitivity of the system to the input signal by 10 times, and the signal -to -noise ratio is only 7.5 dB. ADR435's high -current output and load adjustment allows AD7685 to supply power directly from the benchmark power supply without providing another simulation power rail. Reference PIN buffer can be any low power, stable unit gain, and DC accuracy amplifier. Its broadband noise is less than about 25NV/√Hz, such as OP1177. There is no correct decoupling in Figure 71. Pay attention to obeying the amplifier and ADR435's decoupling guide.

The size of the shape