Features

dual PWM controller can be adjusted

1.9V to 5.3V (Section 1)

1.6V to 3.5V (Section 2) [123) [123) ]

Linear auxiliary driver

regulator

current mode control

sensing resistor

dual synchronization rectifier drive

Disposal function (only

l5994a )

Achieving 96%efficiency

50 μl 12V is a spare consumption

4.75V to 25V Working power supply voltage

excellent load transient response

Jumping pulse function

Output owed pressure stop

Adaptive anti -shooting

Control

Overvoltage/Implip pressure detection

Good power signal

Separation and disable

Hot shutdown

Application [123 ]

Notebooks and sub -notebooks

Computer

1.8V and 2.5V input/output power supply

Writing board

Internet device

] Explanation

This device provides a dual PWM controller and a linear drive controller that can support the power management efficiency of a complete high -power mobile device.

Instructions (continued)

This device generates adjustable regulatory voltage and an outer bipolar of a linear regulating voltage in these two parts, such as for it for for it for for it for for it for for it for for example for it for for it for for example for it for for it for for example for it for for it for example. PCMCIA application. Auxiliary linear drives can provide a power supply up to 1A for the 12V bus, and it can also use it to adjust the 2.5V voltage from 5V bus. Synchronous rectification and pulse jumping mode Anti -voltage parts optimize the overall efficiency exceeding the wide load current range. The two high -performance PWM output parts are monitored whether there are overvoltage, under voltage and over -current conditions. Provide a good signal for each part. When the failure is detected, a good signal of the relevant power supply is generated and a specific shutdown program is performed to prevent physical damage and data damage. The disable function allows separately managing the output power part to optimize the static consumption of IC in the standby state. The internal structure is a current mode that allows the efficiency of not damaging due to the efficiency of ultra -low sensing resistance. When a short circuit occurred in the two sections, forced lack of pressure. The driver provides a adaptive anti -cross -conducting system, which is suitable for high output current applications

Electric characteristics (vin 12V; tj 25 ° C; VOSC GND; Unless there are other regulations.)

Detailed function description

In the device box diagram, six basic functional blocks can be identified

1.9V to 5.1V Small pressure PWM PWM Switch stabilizer (section 1, pin 1, 4 to 8, 30 to 32)

1.66V to 3.3V Small pressure PWM switch regulator (section 2, pin 17 to 20, 24, 24, 24 To 27)

Linear regulator driver used for external PNP transistors (pin 21, 22)

5V low -voltage differential stabilizer (needle pin 29)

2.5 V generator reference voltage

Power management part (pin 9 to 11, 14, 16).

The chip is powered by pins VIN (2) power supply, usually provided by the output of the battery pack or AC-DC adapter, and the voltage range is from 5V to 25V. The bias current of the device returns SGND (13), which refers to internal logic circuits. The external MOSFET driver has its own separate current return, that is, PGND (28). Pay attention to keep the signal machine connecting the ground line and power ground pipe (see layout and grounding section). Two PWM regulators share the internal oscillator, which can be programmed or synchronized through the pin OSC (15).

PWM regulator

Each PWM regulator includes a control circuit and a gate drive circuit used for antihypertensive DC-DC converter in the BUCK topology. These two regulators are independent and almost exactly the same. As shown in the box diagram, they only share the oscillator and the internal power supply different from the preset output voltage. Each converter can be opened and closed independently: RUN1 and RUN2 are the related parts when the application of low -logic levels (below 0.8V) is disabled, and it can operate at high logic levels (higher than 2.4 V). When both inputs are very low, the device is standby, and its current consumption is greatly reduced (less than 120mA in the entire input voltage range). This device can adjust the expected output voltage in two different ways: classic PWM operations and pulse skipping operations (see related chapters).

oscillator

The oscillator does not require any external timing components to control the PWM switch frequency. This can be 200 or 300 kHz, depending on the logical state of controlling the pin OSC, or it can be synchronized by an external oscillator. If the OSC pin is grounded or connected to the pin PREG5 (5V), the oscillator works at 200kHz. By connecting the OSC pin to 2.5V voltage, 300 kHz will be selected. In addition, if the pin OSC and the external signal are shown in Figure 2, the oscillator will be synchronized through its decline. Considering the extension of the oscillator, the frequency of 230kHz can be synchronized. EvenThe frequency value is applied by efficiency consideration in practice. It should also be noted that the increase in frequency will cause some problems (noise, secondary resonance oscillation, etc.), but it does not significantly reduce the size of the external component and the dynamic performance is better. The oscillator applies a time interval (300 nan seconds). During this period, the high -voltage side MOSFET is absolutely closed to charge the self -raising capacitor (see the MOSFET Driver section). This means that the limited loop of the highest load (88.5%@fsw 300kHz, 92.6%@fsw 200kHz, the worst case), in turn appolate the input voltage of the minimum value.

PWM operation

The control loop does not adopt traditional error amplifiers, but uses an error to add a reference voltage, feedback signal, the voltage reduction of the external sensing resistance and the slope compensation compensation compensation compensation Slope (to avoid secondary resonance oscillations with a duty -occupying ratio of more than 50%). Referring to the schematic diagram in Figure 3, the output lock of the two controller is from the oscillator. This will turn off the low -side MOSFET (synchronous rectifier). When the low side grille voltage drops below 0.3V to prevent cross -transmission, open the high -voltage side, allowing it to allow it to be stored in the inductor. Through the above signals, the error is required and determined that the output time lock should be reset. The high -voltage side MOSFET is closed, and the voltage of the synchronous flower on the high -voltage side MOSFET source is reduced to below 2V to prevent cross -transmission, thereby re -circulating the IN catheter current. In any case, the high side MOSFET is closed at the clock signal decline: this is why the tariff is limited to its maximum value. The state reached to the next oscillator pulse. Under the assumptions of the ideal slope compensation, the opening of this control system is:

Among them, A is the gain of error and comparator, and the design is 2. The system is essentially very fast because it tends to correct the basis of the output voltage deviation of almost a cycle. In fact, in the case of changes in the lines or loads, the rare switching cycle is sufficient to stop the transient. The above operations are modified under special or abnormal conditions. Do not consider other situations (as described in Section of Protection for the time being, consider whether the load current is low enough or within the first switching cycle at the start and switch when starting: the electric sensor current may become inconsistent, so during the launch period The last part of the cycle. In this case, the zero current comparator detected the incident and closed the synchronous rectifier to avoid the electrical sensor current reversal and reproduce the natural turnover of the diode when the reverse bias. Improve load efficiency. Both MOSFETs are closed before the next one.

Synchronous rectification

Synchronous rectification technology can achieve very high efficiency under high load current, especially due to the low output voltage, which is particularly beneficial to this point. Essence Low side MOSFET, that is, synchronizing the rectifier, the selected direction resistDit, except for both MOSFETs that are not conductive. Its effect is to significantly reduce power loss during the recycling period.

Although Schartky may look superfluous, it is not a system that requires very high efficiency. In fact, its lower threshold can prevent the diode of the losses of the synchronous rectifier MOSFET in the above dead zone. Both conduction loss and reverse recovery losses have been reduced. In some cases, efficiency can be increased by 1-2%. In addition, a small diode is enough because it can be short. See the Power Management section to understand how to use two synchronous rectifiers to ensure the output of zero voltage in standby state or overvoltage. In order to achieve high efficiency in low load current, in this case, the regulator changes its working method (unless this function is disabled): they abandon PWM A switch cycle occurs in multiple oscillator cycles. When the voltage on the external detection resistor (VRSENSE) does not exist, the light load state is detected when the high side MOSFET is turned on, and the pulse jump threshold (13mv typical values). When reset the signal of the output memory comes from the error and comparator, when the VRSENSE is lower than the value, it is ignored. Once the VRSENSE reaches the pulse jump threshold, it will drive the actual reset. This gives some extra energy that keeps the output voltage higher than its nominal value within a period of time. The oscillator pulse is set. Only when the feedback signal indicates that the output voltage is lower than its nominal value, the output locking values. In this way, most oscillating pulses are skipped, and the frequency of switching is much lower, such as the following relationships:

In the type of k 3.2 × 103

The unit of the FPS is Hertz. Therefore, the loss caused by the switch and gate driver considers the power consumption at low output power, which greatly reduces. 1 section can work when the input voltage is very close to the output voltage (that is, the output voltage is 5V), where the current waveform can be flat to prevent the pulse jumping from being activated. To avoid this, under the low input voltage (VIN u0026 LT; 6.8V), the pulse skipping threshold (only section 1) is about halved. In this case, in the above formula, the constant K becomes 12.8 × 103. When the pulse frequency jumps, the output voltage is about 10mV higher than the PWM method, which is due to its working mode operation. If this load adjustment effect is not satisfactory for any reason, the pulse jump function (see the power management section) may be disabled, thereby reducing the efficiency under light load.

MOSFET driver

In order to obtain a grille driver voltage of the MOSFET MOSFET, self -lifting technology. When the high -voltage side MOSFET is turned off, the capacitor is charged alternately through the diode of the 5V Preg5 line and then connected to its grid polar source to its grille pole source through the internal floating driveOpen MOSFET. The PREG5 series is also used to drive synchronous rectifies, so it is strongly recommended to use a low threshold MOSFET (the so -called logical level device). These driving factor is dynamic , which means that they will not give the source of the current consumption under static conditions (open or off), but only during the transition period. This function aims to minimize the power consumption of the device, even if both low -side MOSFETs are turned on. Use adaptive anti -breakdown protection to prevent cross -conducting: The low -side MOSFET turntable is closed before HSRC pin is higher than 2V. Similarly, the high side MOSFET is disabled until the RGATE pin is higher than 0.3V. When both MOSFETs are in a closed state, the current is guaranteed by the Schottky diode. The time to generate the dead area depends on the current flow of the MOSFET and inductors; in this way, a variety of MOSFETs can be used and avoiding cross -transmission.

Protection

Each converter has sufficient fault protection. The monitoring system checks the output, and quickly disables interested converters when such incidents occur. This condition is locked and allowed to restart the device, either to remove the power supply voltage, or it must be removed from the relatively Runx pin. At the same time, the underwriting situation is detected: slight underwriting (90%of the programming value) can only cause the operation of the two converters when the operation of the two converters is interrupted when the operation of the two converters is low. This is a short -circuit protection. The PWROKX signal (pin 10 and 23) shows the abnormalities of the relevant part (the output voltage is not ± 10%of the programming voltage), and the output level is low. If the chip is overheated (more than 135 ° C typical values), the device stops running as long as the temperature is lower than the safety value (a typical value of 105 ° C). The low level on the two PWROKX of the ultra -temperature state also sends a signal. The current limitation comparator prevents overloading excessive current. It intervened in VRSense more than 50mV in the form of voltage, and turned off the high -voltage side switch before the error seeking and the previous turnover. By the way, this is also enabled the designer to program the maximum working current by choosing an appropriate sensor resistance. This pulse limit provides quasi -constant stream characteristics.

Linear driver

This linear drive can be reduced from an external PNP transistor from the external PNP transistor to 60mA to consider the typical application circuit shown in Figure 4. The internal comparator supply VDRLIN from the same pin, and can accept voltage from 4.5V to 20V. If the input voltage range that allows adjustment is applied, the power supply power can be obtained directly from the input source (VIN). If this is not the case and there is no additional input voltage, the most convenient way to obtain the power supply uses auxiliary wounds on the two sections of the two sections of the two sections, with capturing diode DS and filter capacitors, as shown in Figure 5. During the cycle cycle of each switch cycle, the winding is passed to Pin VDRLIN, which is determined by the voltage ratio ratio N. The dependence on the input voltage is verySmall.

If the part with auxiliary winding is working under full load, and the linear regulator is light load, the voltage at the pin VDrlin may exceed the expected value. In fact, DS and CS serve as peaks to maintain circuit VDRLIN are affected by switching transient voltage peaks. The maximum value of the internal clamping limit is 16V, but the power consumption of the chip will be up when intervention. As long as the chip has Preg5 and VREF, the linear drive is always in a state of activity (see the relevant chapters); the purpose of its work is to obtain a voltage of about 2.5V on the VFBLIN pin. In this way, the minimum regulating voltage is 2.5V, and the VFBLIN pin is directly connected to the output, and the maximum value is about the power supply voltage minus the bipolar PNP VCESAT.

In order to make the regulator work normally, the voltage at the pin VDrlin must not be too low. If there is a good magnetic coupling combination, one of the two windows can ensure good voltage adjustment. Coupling, but if the main output load is light, the electrical sensor configuration cannot maintain the auxiliary voltage: the secondary voltage decreases, and the system loses the adjustment. If the load of the relevant part is large enough, the L5994 can be used to achieve additional winding. In order to overcome this problem, in L5994A, when the VDRLIN voltage is lower than a certain threshold (13.7V ± 5%), because the load on the segment 2 is too light, the relevant synchronous rectifier is zero at the inductor current ( one trigger at one time (one trigger Features, see Figure 6). In this way, the electrical sensor current will be transmitted to the output capacitor energy of the auxiliary output to reverse and absorb the energy. If the linear driver is not provided by a linear drive, it is provided by a linear drive. Keeping floating this pin means that the linear drive is not provided, so the power supply will not be wasted (only L5994). If at least one of the two RUNX signals is asserted, the linear regulator activation

+5V linear regulator and the+2.5V reference voltage generator 5V low voltage and stabilization voltage voltage The device is directly powered by the MOSFET drive, and it can get +5 from the outside through pins. The low -pass filter is connected between the PREG5 pin and the SREG5 pin, and all internal circuits are so powerful. The introduction of this R-C network can help reduce the effect of noise. The typical external purpose of this generator is to charge the high -voltage side MOSFET for the two PWM converters for self -lifting capacitors used to generate a gate -drive. When starting and not working in the 5V segment, the regulator is powered by the chip input voltage. In order to reduce power consumption, turn off the linear regulator, and connect the inside of the Preg5 pin to 5V as 5V PWM regulator and its output voltage is higher than the switching threshold, 4.5V. This happens when the V5SW pin is connected to the 1 -stage output adjustment 5V. In any case, if the V5SW is higher than 4.5V and the internal regulator is turned off, the Preg5 is powered by this pin.

L5994-L5994a

5V regulator is always in a state of activation. Even if both PWM regulators are disabled, the 2.5V reference voltage generator provides a comparison level of threshold detection and device operation. Allows to provide a power supply VREF up to 5mA from its buffer output (available through the external pins). If at least one of the two RUNX signals is asserted, the reference voltage generator activates. If Preg5 or VREF does not provide the correct voltage, the device is closed.

Power Management

This device is equipped with some control sales, suitable for performing some commonly used functions or sometimes required for battery power supply equipment. In addition, it is characterized by control timing to prevent opening/shutdown and device shutdown, which can run safely and reliable under any circumstances. As mentioned above, Run1 and RUN2 pins allow two PWM converters to disable two PWM converters separately, as mentioned earlier, and signals (may from μP). Noskip can disable the pulse jump function: When it remains high, both PWM regulators are not allowed to enter this operation. When the output of the PWM regulator, the two PWROKX signals (one part of each part) immediately drive the low level lower than its own underwriter (light or hard) threshold or when it is disabled. When the relative regulator runs normally, the value is high. The capacitors connected between CRST and the ground fix a time in the order of 1.5MSEC/NF to delay the transition of PWROKX-high. This occurs when each section starts or recovers the condition of the relatively Runx command after the lack of pressure. The delay from the output voltage reaches the correct value. In another case, the same delay will also be involved: when a section is disabled (because its RUNX is low or due to heat), the relevant synchronous rectifier is opened after the above delay to ensure that the load is no longer supplied to supply the load. Essence However, in the case of overvoltage, this delay does not work: synchronizing the rectifier immediately turns off and shuts down, thereby playing a built -in crowbar role. All these timing sequences are shown in Figure 7.

Design program

Basically, the application circuit topology is fixed, and the design process only involves component values u200bu200bsuitable for voltage and current requirements for specific applications. Therefore, the design data we need to know is:

input voltage range:

minimum (Vinmin) and maximum (VINMAX) voltage applications are expected to run

Maximum load current

Segment iOUT1

Section 2 ip2

The output voltage and current of the linear regulator, set to 12V 50mA, use additional winding 5.1V segment [ 123]

The maximum peak ripple amplitude of the output voltage of each switching section:

VRPP 11

VRPP2

The operating frequency FSW (200kHz/300kHz or external synchronization).

It is worth doing some preliminary considerations. The selection of switching frequency depends on the requirements of the application. If the goal is to minimize the size of the external component, you should choose 300kHz. For low input voltage applications, 200KHz is preferred, because this will lead to a higher maximum duty cycle. For switching stabilizers, the inductance value of the output filter affects the inductive current ripple: the higher the inductance, the smaller the ripple. This means lower current -influenza resistance (for a given IOUT), lower iron heart loss and lower output voltage ripples (for a given output capacitor), but on the other hand, more due to load changes due to load changes Copper loss and worse transient behavior. It is usually the maximum ripple amplitude (when VINMAX) is selected between 15%to 50%of the full load current. It is very convenient to introduce a ripple coefficient RF, so it is a number between 0.15 and 0.5. For a linear regulator, its input voltage VDRLIN should not be lower than 12V, so if the auxiliary wind is used, the size should be determined to obtain a voltage with a certain amount of error (eg, 13-14V). In contrast, higher input voltage will cause higher loss inside the PNP transistor, which will cause damage efficiency and cause higher loss+total current on 5V inductors. In addition, it means a higher number ratio, so the magnetic coupling is even worse, which will affect the energy transfer during the anti -flight process.

+3.3V inductor

When defining the inductance, first determine the inductance value. The minimum value is given by the following formulas:

The selected value L3 u0026 GT; L3min should be selected. The selection of core geometric shapes and specific applications in the use of space and other practical problems, such as the convenience, availability, and so on. As for the material, you should choose ferrite, molybdenum alloy or Koolmμ to achieve high efficiency. These materials provide low -iron heart loss (especially iron oxygen), so the design can be concentrated in preventing saturation and restricting copper loss. Even at the maximum peak, you must avoid saturation. Current:

is to limit copper loss, the winding DC resistance RL should be as low as possible (within M u0026#8486; range). Automatic control loss can usually be ignored. The practical standard of reducing DC resistance is the core of the use of the largest wires suitable for selection. In any case, the best solution, as long as it is possible, is used to use the existing electrical sensor that the electrical sensor is inductive and maximum DC current. At present, there are many types of products provided by Man U manufacturers, and they are also suitable for surface installation components.

+5.1V transformer

The one -time winding also carries the secondary power, so the total average current is:

Among the, VDRLIN is a return back toThe voltage generated during the re -cycle of the road, and the input terminal linear regulator of+12V.Select the transformer's turn ratio to 1: n, so that VDRLIN is greater than 13V to minimize the messy parameters, the secondary side reference 5.1V output, so the minimum value is obtained from the following formulas:

]

Among them, VF is the positive voltage drop of the rectifier (assuming 1V is conservative value).Make sure the auxiliary device is connected to the correct polarity (see Figure 4).The minimum inductance value can be expressed as:

In the formula, if you want to get the positive value of L5Pmin, you must meet the same formula:

Among them, VINIt can be Vinmin or Vinmax, which takes a higher value of L5Pmin.For one -to -line L5P u0026 GT; L5Pmin, a peak current (must not be saturated by the magnetic core) as:

As for the implementation of the transformer, you can repeatedly consider the+3.3V electrical sensor.