Features

8 -channel protection low -side drive

-8 NMOS FET, with current protection

- Integrated induction capture diode

- Serial interface

- Opening/short -circuit load detection (only DRV8860 )

- 100%output fixed time

- Can be configured with PWM duty cycle

continuous current driving capacity

–560ma (single channel opening) PW and PWP

–200MA (8 channels are opened) Pw

-330mA (8 channels open) PWP

-In support parallel configuration

8 V to 38 V power supply voltage range

Input digital noise filter used for antidity

internal data return function, realize reliable control

protection and diagnosis function [123 123 ]

- Over -current protection (OCP)

- Opening load detection (OL)

-Chanded stop (OTS)

- IOU Lock (UVLO)

- Individual channel status report

- Failure status alarm

Application

relay, single -step motor

[123 ] solenoid valve, electromagnetic drive

General low -voltage side switch application

)

Explanation

DRV8860 provides 8 -channel low -side drives with over -current protection and opening/short -circuit load detection. It has a built -in diode to cut off the interruption transient produced by the sensing load and can be used to drive the single -step motor, DC motor, relay, thread tube or other loads. PWP packaging can provide up to 330 mAh × 8 channels, while PW packaging can provide continuous output current with up to 200 mia × 8 channels. Single channels can provide continuous output currents up to 560 mAh.

Provide a serial interface to control the DRV8860 output drive, configure the internal settings, and read the failure state of each channel. The DRV8860 device can be connected to the chrysanthemum chain to use a single serial interface. The power -on time and keeping the PWM output cycle can also be configured by serial interface. These functions allow the operation to run ratio that has been runningEven more cold.

Provide internal shutdown functions of overcurrent protection, short -circuit protection, low -voltage locking and ultra -temperature. DRV8860A does not include opening load detection. The fault information of each channel can be read through the serial interface, and the external fault pins can be indicated.

Equipment information

(1), please refer to the appointment of the doctor's order content at the end of the data table.

Jane Figure

Typical features

Detail ] Overview

DRV8860 is an integrated 8 -channel low -voltage side drive, which has over -current protection and opening/short -circuit detection functions. It has a built -in diode to cut off the interruption transient produced by the sensing load and can be used to drive the single -step motor, DC motor, relay, thread tube or other loads.

DRV8860 can provide continuous output current as high as 200 mAh X 8 channels. The current driving capacity increases with the decrease in the duty -occupying ratio of the pulse. Single channels can provide continuous output currents up to 560 mAh. For details, see the current function table.

Provide a serial interface to control the DRV8860 output drive, configure the internal register settings, and read the failure state of each channel. Multiple DRV8860 devices can be connected to the chrysanthemum chain to use a single serial interface. The power -on time and keeping the PWM duty cycle can also be configured by serial interface. These functions allow operations to run cooler operations than traditional online solutions.

Provide internal interruption functions such as overcurrent protection, short -circuit protection, under pressure atresia, and over temperature. DRV8860 can diagnose the load of the road. DRV8860A does not include opening load detection. The fault information of each channel can be read through the serial interface, and the external fault pins can be indicated.

Function box diagram

Feature description

It is recommended Parameters, such as the system temperature, maximum shell temperature and total output occupation ratio. PWP packaging provides better heat dissipation capabilities #8482 through PowerPad; therefore, whether to drive a higher output current cable or a cable with a slightly lower operating temperature than the device in PW packaging.

Chrysanthemum chain connection

Two or more DRV8860 devices can be connected together to use a single serial interface. The SDATOUT pin of the first device in the chain is connected to the SDATOUT pin of the next device. SCLK, LATCH, RESET and NFAULT pins are connected together.

FIG. 7 and 8 show the configuration timing of the two devices in a single device and the chrysanthemum chain connection.

Protective circuit

DRV8860 has sufficient protection to prevent pressure, over current and overheating events.

Overcurrent protection (OCP)

When the output current exceeds OCP to touch power generation, the corresponding channel is automatically closed. The NFAULT pin will be set to low, and the corresponding OCP logo in the fault register will be set to 1.

By setting the data storage position to 0 , as long as the corresponding output is turned off, the over -current failure will be automatically removed. Alternatively, the special command of fault reset will also be removed. In these two cases, all bit in the fault register is cleared, NFAULT will be released.

Open load detection (OL) -It-only DRV8860

When any output is in a closed state (the corresponding data storage position is set to 0 ), the current remittance will be about 30 μA of about 30μA. The voltage is pulled down the node. If the voltage on the foot is detected less than 1.2 V, the load of the road is reported. NFAULT is driven to a low level and is set to the OL bit corresponding to the fault register (F8: F1) corresponding to a specific channel.

By setting the data storage position to 1 , as long as the corresponding output is turned on, the opening load failure will be automatically removed. Alternatively, the special command of fault reset will also be removed. In these two cases, all bit in the fault register is cleared, NFAULT will be released.

Hot shutdown (TSD)

If the mold temperature exceeds the safety limit, all outputs will be disabled, and the NFAULT pin will be driven low. Once the mold temperature drops to the safe level, the operation will automatically restore. After recovery, the NFAULT pin will be released.

IOU locking (UVLO)

If the voltage on the VM pins is lower than the voltage of the underwriting lock at any time, all circuits in the device will be disabled, the internal logic will be heavy, and the internal logic will be heavy. Set. When VM is higher than the UVLO threshold, the operation will be restored. In this case, NFAULT will not be asserted.

Digital noise filter

DRV8860 has an internal noise filter on all digital input. In the noise system, noise may interfere with the serial chrysanthemum link interface. If there is no input filter, this noise may cause unexpected behavior or output status. Digital input filters can eliminate unnecessary noise frequency and allow fast communication through serial interfaces.

Device function mode

Internal register

DRV8860 is controlled by a simple serial interface. During the operation, three registers are used: data registers, control registers and fault registers.

The movement flow and direction of register data will be affected by special commands.

By default, the 8-bit displacement register data was moved to the output control register data-reg.

Programming

Serial control interface

DRV8860 uses chrysanthemum chain serial connectors. The data is locked into the register of the rising edge of the lock pins. When the data is written, the clock is up along the CLK, and the clock is on the CLK when reading.

Data writes to the waveform

Failor register read waveform

] Special Command

In addition to the output/control control and failure status, the DRV8860 also has special functions, making the system more robust or more power saving. These functions require special commands to start the device or configure the internal register.

There are 5 special commands:

1. Write the control register command

2. Read the control register command

3. Read the data register Command

4. Failure register reset command

5.pwm boot command

Special waveform pattern on CLK and insertion will issue a special command, as shown below:

Write to the control register

When the writing control register command is issued, the following serial data will be locked to the timing and the duty cycle control register register middle.

Reading the control register

When the read control register command is issued, the content of the control register will be copied to the internal displacement register, and The subsequent CLK will be removed from DOUT PIN. This provides a mechanism for verifying whether the register is correctly programmed.

Read the data register

When the Read Data Register command is issued, the content of the internal output data register will be copied to the internal displacement register , Subsequent CLK will remove the content from DOUT. This provides a mechanism for system verification output data to correctly program. It makes the system more powerful in the noise environment.

Bit

When a failure register reset command is issued, the internal 16 -bit fault register will be cleared. Using this method, the system can remove the fault in all chain equipment at one time.

Special instructions: PWM Start

When a failure instruction of the failure register is issued, the output channel will be ignored by PWM mode.

output power and PWM control

The output of the device is divided into two stages: the power -on phase and the PWM stage.

In the power -powered stage, the channel was opened at a 100%duty ratio, and the duration was set by the control register position C4: C1.

During the PWM chopping stage, the PWM duty cycle is defined by the control depositor position C7: C5.

Table 4 describes the behavior of each bit in the control register.

As shown in Figure 29 to 33, there are five operating cases.

The output is connected with a 100%duty ratio.

The output is opened in the PWM chop mode, and the duty cycle is defined by the control register position C7: C5.

During the duration set by the controller position C4: C1, the output is opened with a 100%duty -occupying ratio. After the timer expires, the output is switched to the PWM chop mode. The PWM duty cycle is defined by the controller position C7: C5.

During the duration set by the controller position C4: C1, the output is opened with a 100%duty -occupying ratio. After the timer expires, the output is closed.

The PWM startup special command

Output is opened in a 100%duty -occupied power ratio, the timer is enabled, and the duration is set by the control register position C4: C1. If the PWM starts special instructions before the timer expires, the output is switched to the PWM chop mode, and the PWM duty cycle is defined by the control register position C7: C5. If the timer is expired and the PWM startup is not received, the device will maintain a power -powered mode regardless of other PWM startup commands.

Application and implementation

Note

The information in the following application chapters is not part of the TI component specification. TI does not guarantee its accuracy Or integrity. TI's customers are responsible for determining the applicability of the component. Customers should verify and test their design implementation to confirm the system function.

Application information

DRV8860 is an eight -pass with a protective functionLow -end drive. The following design is a common application of DRV8860.

Typical application

Design requirements

Detailed design program

Drive The current

The current path is from the virtual machine, through the load, enter the low -side sinking drive. Calculated the power consumption of the power consumption in a sink with Formula 1.

Application curve

Power suggestion

DRV8860 design for 8 to 38 V Work within the range of input voltage (VM). The 0.1-μF ceramic capacitor for VM must be as close to the VM pin as much as possible. In addition to local decoupling capacitors, additional large capacitors also need to be adjusted according to the application requirements.

The size of the volume capacitor is an important factor in the design of the motor drive system. It depends on multiple factors, including:

power supply type

Parasitic inductance

Load type

Load boot current

The inductance between the power supply and the motor drive system will limit changes in power currents current Rate. If the local large -capacity capacitance is too small, the system will respond to excessive current requirements, or uninstall from the motor as the voltage changes. Users should adjust large -capacity capacitors to meet acceptable voltage ripples.

The data table usually provides a recommended value, but it is necessary to perform system -level tests to determine large -capacity capacitors with appropriate size.

Power and logical sorting

DRV8860 does not have a specific power order. Before applying a virtual machine, the digital input signal can exist. After VM is applied to DRV8860, it starts running according to the state of the control pin.

Layout

layout guide

For ceramic capacitors with a rated value of 1 μF, it is recommended to use a ceramic capacitor with a rated value of 0.

The capacitor should be as close to the VM pin as much as possible as possible, and there is a thick trace line or ground plane with the device GND pins.

VM pins must use appropriate large -capacity capacitors to bypass the ground. This part must be near DRV8860.

layout example

Among them, the pull -up voltage (V3P3) is a digital opening and negligible lossExternal power supply within the scope of the recommended work conditions.

Hot consideration

DRV8860 device has the heat shutdown (TSD) described in the heat shutdown (TSD) part. If the mold temperature exceeds about 150 ° C, the device will be disabled until the temperature drops to the safe level.

Any trend of the device entering TSD indicates that the power consumption is too large, insufficient heat dissipation, or the environmental temperature is too high.

Power consumption

The power consumption of the DRV8860 device is mainly determined by the output FET resistor RDS (on). Use the following formula to calculate the estimated average power consumption of each output when running the load.

In the formula:

pd is the power consumption of a channel

RDS (on) is The resistance of each fet

IO is the RMS output current applied to each channel

IO is equal to the average current entering the channel. Note that at the start, the current is much higher than the normal operating current; these peak currents and their duration must also be considered.

The total device loss is the power consumed in each channel.

The maximum power consumed in the device depends on the ambient temperature and heat dissipation.

Note that

RDS (on) increases with the increase in temperature, so the power consumption increases with the heating of the device. This must be considered when determining the size of the heat sink.

Heating

PowerPad package uses exposed pads to remove the heat in the device. In order to correctly operate, the pad must be connected to the copper heat on the PCB to dissipate heat. On the multi -layer PCB with floor floor, this connection can be completed by adding multiple holes to connect the hot pad to the ground.

On PCB without internal planes, you can add a copper area to any side of the PCB to dissipate heat. If the copper zone is on the other side of the PCB, the thermal hole is used to convey the heat between the top and the bottom layer.