General description

lmx2315 /2320/2325 is a high -performance frequency synthesizer, which integrates the operating frequency of the RF premature frequency frequency of 2.5 GHz. They are manufactured using the ABIC IV BICMOS process of National Aluminum Corporation. It can provide a ratio for LMX2315 and LMX2320 radio frequency synthesizers as high as 1.2GHz and 2.0GHz at the input frequency, while 32/33 and 64/652.5 GHz LMX2325. Using proprietary digital lock ring technology, LMX2315/2320/2325 linear phase detectors can generate very stable and low -noise signals to control local oscillator. The serial data is transmitted to LMX2320 and LMX2325 through the third -line Microwiretm interface (data, enable, clock). The power supply voltage range from 2.7V to 5.5V. The performance of LMX2315, LMX2320 and LMX2325 is very low -current consumption, usually 6 mAh, 10 mia and 11 mia, respectively. LMX2315, LMX2320 and LMX2325 can be packed with plastic packaging from TSSOP 20 stitch surfaces.

Features

Y RF operation up to 2.5 GHz

2.7V to 5.5V operations

Low -current consumption

dual -mode interview Frequency division: LMX2325 32/33 or 64/65LMX2320/LMX2315 64/65 or 128/129

Internal balance low leakage charge pump

Sleep mode: VCC E 3V It is 30 mA (typical values)

small outline, plastic, surface installed Tssop, 0.173 × wide

Application

Honeycomb phone system (GSM, IS-54 ，IS-95，（RCR-27）

便携式无线通信（DECT、PHS）

有线电视

其他无线通信系统

[123 ]

Note 1: LMX2315 and LMX2320's predetermined scale is 64/65 or 128/129, while the bidding spacing of LMX2325 is 32/33 or 64/65.

Note 2: The power -off function is selected by the charge pump to prevent unnecessary frequency jump. Once the power supply is closed, the component will enter the power -off mode when the charge pump reaches a three -state state.

Absolutely maximum rated value (Note 1, 2)

Power voltage

VCC B0.3V to A6.5V

vp B0.3V to A6.5V

The voltage on any pin

ground E 0V (vi) B0.3V to A6.5V

[ 123] Storage temperature range (TS) B65 §C to A150 §C

Lead temperature (TL) (weld, 4 seconds) A260 §C

Suggesting

Conditions conditions

Power voltage

VCC 2.7V to 5.5V

vp vcc to A5.5V

working temperature (TA) B40 §C to A85 §C

Note 1: The absolute maximum rated value indicates that the device may occur. The running rated value indicates that the device is designed to play the function, but does not guarantee specific performance restrictions. For the guarantee specifications and test conditions, see electrical characteristics. The guarantee specifications are only applicable to the conditions listed.

Note 2: This device is a high -performance radio frequency integrated circuit with a rated value K 2 KV with electrostatic discharge function, which is sensitive to ESD. The handling and assembly of this device should be carried out at the ESD workstation.

电气特性

LMX2325和LMX2320 VCC e VP e 3.0V；LMX2315 VCC e VP e 5.0V；b40§C k TA k 85§C，除非另有规定

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Electric characteristics SLMX2325 and LMX2320 VCC E VP E 3.0V; LMX2315 VCC E VP E 5.0V; B40 §C K TA K 85 §C, unless there are other regulations (continued) [123) [123) [123) [123) [123) [123) [123) [123) [123) [123) ]

** Except oscout

Note 1, 2, 3: See the equations in the definition of the charged pump current

Typical performance characteristics [ 123]

The current specification of the charge pump

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[

123] Note 1: N E 10000 R E 50 P E 64

Note 2: When the error of separation of radio frequency output is greater than or equal to 1Hz, the sensitivity limit is reached.

Function description

The simplified box diagram below shows 19 digits of data registers, 14 -bit R counters and S locks, and 18 -bit N counters (the middle lock is not displayed). The data stream enters the data input at the clock (at the rising edge), and MSB is preferred. If the control bit (the last input) is high, the dataTransmitted to the R counter (programmable reference allocation) and S 闩 locks (pre -scoring device selection: LMX2315 and LMX2320: 64/65 or 128/129; LMX2325 32/33 or 64/65). If the control bit (LSB) is low, the data is transmitted to the N counter (programmable removal).

The programmable reference frequency division (R counter) and the pre -scorer selection (S lock) If the control bit (move to the last bit of the data register) is very High, the data is transmitted from 19 displacement registers to 14 -bit locks (setting 14 -bit R counter) and 1 -digit S lock (S15, set premissions: 64/65 or 128/129LMX2315/20 or 20 or 20 or 20 or 128/129LMX2315/20 or 20 32/33 or 64/65 (for LMX2325). The serial data format is shown below.

Note: The ban is less than 3.

Diversion Compared: 3: 16383

S1 to S14: These bits select a programmable reference pressure division.

C: The control bit (set to a high level to load the R counter and S 闩 lock)) Data first shifted in MSB.

Functional description (continued)

A programmable divider (n counter)

n counter consisting of 7 swallow counter (A counter A counter (A counter A counter (A counter A counter (A counter A counters ) And 11 -bit programmable counter (B counter). If the control position (move to the last bit of the data register) is low, the data is transmitted from the 19 -bit displacement register to the 7 -bit lock (set 7 -bit swallow (A) The counter and 11 -bit locks (for setting 11 -bit programmable (B) counter). Display the serial data format.

Note: Diversion ratio: 3 ～ 3 ～ 2047 (prohibiting a diversion ratio of less than 3)

Pulse swallowing function

FVCO E [(P C B) A] C FOSC/R Company

FVCO: Output frequency of external pressure control oscillator (VCO)

B: Binary 11 -bit programmable preset frequency counter (3 to 2047)

a: binary 7 -digit swallow counter pre -pre -pre -pre -pre -pre -pre -pre -pre -pre -pre -pre -pre -pre -pre -pre -mounted Set frequency (0 s a s 127, A S B) FOSC: Output frequency oscillator with external reference frequency

R: Binary 14 -bit programmable reference counter (3 to 16383) preset frequency frequency Compared with

P: The preset mode of the pre -splitter of the dual module (64 or 1282315/20 or 32 or 64 (2325)

function description (continued)

Serial data input time

Note: The data in the bracket represents a programmable reference pressure division data. The data is moved into the register along the clock rising. Data is first shifted in MSB.

Test conditions: Use the symmetrical waveform of the VCC/2 to test the serial data input timing of the serial data. The edge rate of the test waveform is 0.6 v/ns2.2v@vcc E 2.7V and 2.6V@vcc E 5.5V.

Phase feature

In normal operation, the FC pin is used to reverse the polarity of the phase detector. Internal and external oil supply pumps are affected. According to the characteristics of the VCO, FC pins should be set

Therefore, when VCO features are (1), FC high or opening should be set; when VCO characteristics such as (2), FC should be set low. When the FC is set to a high level or an open road, the phase comparator inputs is set to the benchmark frequency division, FR. When the FC is set to low, the FOUT is set to a programmable binocator output, FP.

Note: During the phase difference detection range: B2Q to A2Q When the ring is locked, the upper pump and lower pump current pulse of the minimum width appears on the DO pin Essence FCE High

Simulation switch

The simulation switch is suitable for radio systems that use frequency scanning mode and narrowband mode. The role of analog switch is to reduce the time constant of the circuit filter, so that the voltage control oscillator can adjust the new frequency time in a shorter time. This is achieved by adding another filtering level in parallel. The output of the oil supply pump is usually through the DO pin, but when the LE is set to high, the output of the charge pump can also be used in BISW. The typical circuit is shown below. This second-level filtering (LPF-2) is effective only when the switch is closed (in scanning mode).

The typical crystal oscillator circuit

A typical circuit oscillator that can be used to achieve crystal is shown below.

Typical lock detection circuit

Need a lock detection circuit to provide a stable loop when the lock ring is locked, and the low signal is low. The typical circuit is shown below.

Business description:

1. Pressure control oscillator assumes AC coupling.

2.RIN increases impedance, so that VCO output power is provided to the load instead of PLL. Depending on the VCO power, the typical value is 10 to 200 times. The range of fins radiofrequency resistance ranges from 40 to 100 times.

3.50X terminals are usually used for test boards to allow external reference oscillating to allow external reference oscillating. For most typical products, the CMOS clock is used, and there are no resistors that need to be connected. OSCIN can be communicated or DC coupling. SuggestUse AC coupling because the input circuit provides its own bias.(See the figure below)

Layout prompt:

Correctly using grounding and bypass electrical containers is the key to achieving high -level performance.Through a careful circuit board layout, the string between the feet can be reduced.This is a static sensitive device.It can only be handled on a non -static workstation.