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2022-09-16 16:00:09
LPC660 low power consumption CMOS four -way computing amplifier
Function description
LPC660 CMOS four -way computing amplifier is the ideal choice of rail -to -rail output swinging single power operation. It has a micro -power operation: (1 MW) The operating voltage range is used from +5 to +15 volts for 100 kΩ and 5 kΩ loads, except for input co -mode range, including grounding. High -voltage gain: 120 DB Performance restrictions on CMOS
Low input offset voltage: In the past, 3 MV amplifiers did not exist in this problem
Low offset voltage drift: 1.3 μV/° C design. Enter VOS, drift and broadband noise
Ultra -low input bias current: 2 FA, voltage gain (100 kΩ and 5 kΩ) is equal
is not better than widely acceptable bipolarity Equivalence, the input co -mode includes V and the power supply needs are usually less
The working range from+5V to+15V, greater than 1MW.
Low distortion: 0.01%at 1 kHz. The chip uses national advanced dual-level-conversion rate: 0.11V/μS polycrystalline silicon grid CMOS process. All military temperature. The available scope is referred to as the LPC662 dual CMOS data table
The operation amplifier and the LPC661 data table
Apply a single CMOS operational amplifier as these
high impedance buffer
Precision current voltage converter
Long -term integral device
High impedance front placedor
Active filter
Sample maintenance circuit
Peak detector
The frequency of the oscillator is determined by R1, R2, C1, and C2: FOSC 1/2πrc type R R1 R2, C C1 C2.
(1) Absolute maximum rated value indicates the limit of damage to the device. The work rated value represents the function of the device, but does not guarantee specific performance restrictions. See electrical characteristics for the specifications and test conditions for guarantee. The guarantee specifications are only applicable to the test conditions listed.
(2) When the voltage is V, do not connect the output to V ++ greater than 13V or reliability may be adversely affected.
(3) Applicable to single power and sub -supply operations. The short circuit of the ambient temperature and/or multiple computing amplifiers can lead to a maximum allowed temperature of 150 ° C. The output current exceeds ± 30 long -term MAs may adversely affect reliability.
(4) The maximum power consumption is the functions of TJ (MAX), θJa, and TA. The maximum allowable power consumption temperature in any environment is pd (TJ (MAX) – TA) θja.
(1) The absolute maximum rated value indicates the limit value that may cause damage. The work rated value represents the function of the device, but does not guarantee specific performance restrictions. See electrical characteristics for the specifications and test conditions for guarantee. The guarantee specifications are only applicable to the test conditions listed.
(2) For running at high temperatures, the power must be reduced according to the thermal resistance θja and PD (TJ -TA)/θja.
(3) All numbers are suitable for packaging directly welded to PC boards.
DC picots
Unless there are other regulations, all guarantee limit in TJ 25 ° C. Black body limit is suitable for extreme temperature. V+ 5 volts, v 0V, VCM 1.5V, VO 2.5V, RL GT; 1m, unless there are other regulations.
(1) The limit is guaranteed by the test or correlation.
(2) Military RETS electrical test specifications can be provided according to the requirements. When printing, the LPC660AMJ/883 RETS specification fully meets the rough body limit of this column. LPC660AMJ/883 can also be procurement specifications according to standard military drawings.
(3) V+ 15V, VCM 7.5V, RL connected to 7.5V, source pole test, 7.5V ≤VO≤11.5V; sinking test, 2.5V ≤VO ≤ 7.5V.
DC Power Special (continued)
Unless there are other regulations, all guarantee limit in TJ 25 ° C. Black body limit is suitable for extreme temperature. V+ 5 volts, v 0V, VCM 1.5V, VO 2.5V, RL GT; 1m, unless there are other regulations.
(4) When the voltage is V, do not connect the output to V ++ greater than 13V or reliability may be adversely affected.
AC electrical characteristics
Unless there are other regulations, all guarantee limit in TJ 25 ° C. Black body limit is suitable for extreme temperature. V+ 5 volts, v 0V, VCM 1.5V, VO 2.5, RL GT; 1m, unless there are other regulations.
(1) The limit is guaranteed by the test or correlation.
(2) Military RETS electrical test specifications can be provided according to the requirements. When printing, the LPC660AMJ/883 RETS specification fully meets the rough body limit of this column. LPC660AMJ/883 can also be procurement specifications according to standard military drawings.
(3) V+ 15V, which is connected to the 10V jump into the 10V step as a voltage follower. The specified number is positive and negative conversion rateThe slower one.
(4) Reference input. V+ 15V, rl 100kΩ, connected to V+/2. Each amplifier is motivated at a frequency of 1 kHz to generate VO 13 VPP.
Typical performance features
vs ± 7.5V, TA 25 ° C, unless there are other regulations
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Program prompt
amplifier topology
The topology structure for LPC660 is non Compared with general operational amplifiers), because the traditional unit gain buffer output is not used, it is directly from the integrator to allow the output swing between the rail. Because the buffer traditionally provides electricity for the load, maintaining the gain and stability of the high -transportation amplifier, and must be able to withstand the short circuit of any orbital. These tasks are now falling into the integrator. Due to these requirements, the integral device is a dual -feed -up complex with a dual -feed -up gain level. In addition, the output part of the integralizer is a push -pull structure that is used to transmit heavy loads. At the same time, the entire amplifier path is sinking from three gains and a feedback level, and the source path contains four -level feedback.
For the load resistance of AT, the large signal voltage gain in the source is at least 5 kΩ. Due to the additional gain level, the gain when the waves are trapped are higher than that of most CMOS operations amplifiers; however, when the driving load resistor is less than or equal to 5 kΩ, the gain will be reduced as the electrical diagram shows. The operation amplifier can drive the load resistance as low as 500Ω without losing stability.
Compensation input capacitance
Reference LMC60 or LMC662 data table determines whether the value of the capacitor compensation and the value of the capacitance is required.
Increased load container
Like many other computing amplifiers, the LPC660 may oscillate, and its application load seems to be capacitance. The threshold oscillation changes with the load and circuit gain. The most sensitive structure of oscillation is the unit gain follower. See typical performance characteristics. The load capacitor interacts with the output resistance of the computing amplifier to generate an extra pole. If the frequency of this pole is low enough, it will reduce the phase margin of the operation amplifier, so that the amplifier will no longer be stable at low returns. A small resistance (50Ω to 100Ω) and a capacitor (5PF to 10 PF) at the output end of the computing amplifier and a capacitor (5PF to 10 PF) from reverse input to the output pin, without interference low -frequency circuit operations. Therefore, the capacitance value can be tolerated without oscillation. Note that in all cases, when the load capacitance is close to the oscillation threshold, the output will be loud.
The capacitance load driving capacity is enhanced by using V+pull -up resistors (Figure 27). A typical pull -up resistance of 50 μA or larger will significantly improve the capacitance load response. The values u200bu200bof the pull -up must determine the output swing based on the capacity of the amplifier relative to the required current trap. The opening gain of the amplifier will also be affected by the upper pull resistor (see some characteristics of the electrical)
High impedance work [123 ]
It is generally believed that any circuit that must run under a leakage current of less than 1000Pa requires a special layout of the PC board. When people want to use the ultra -low bias current of LPC660, they are usually less than 0.04Pa and must have a good layout. Fortunately, low leakage is very simple. First of all, users cannot ignore the surface leak of the PC board, even if it may sometimes look low, because under the conditions of high humidity, dust or pollution, the surface leak will be obvious. In order to minimize the impact of any surface leak, place a circle of metal foil around the input terminal of the LPC660 and the terminal input of a capacitor, diode, conductor, resistor, relay terminals connected to the computing amplifier. See Figure 28. In order to play a significant effect, the protective ring should be placed on the PC board at the same time. Then, the PC foil must be connected to the input terminal of the same voltage as the amplifier voltage, because there is no leakage current between the two points of the same potential. For example, the PC board tracking pad resistor 1012 ohm is usually considered a very large resistance. It may leak 5 paa. If the trace line is a 5V bus, close to the input board. This will lead to the actual performance of LPC660. However, if the protection maintains the input voltage range of 5 millivolo, even if the resistance 1011 Ohm will only cause the leakage current of 0.05, or it may cause the performance of the amplifier. The typical connection of the protective ring is shown in Figure 29A, Figure 30B, and Figure 31C standard operation amplifier configuration. If both inputs are activity and have high impedance, the protection device can be grounded and provided with some protection; see Figure 32D.
The designer should realize that it is an inappropriate circuit to arrange a PC machine plate just for a few, and there is another other. A technology is even better than the protective ring on the PC board: Do not insert the input pins of the amplifier to insert the circuit board, but bent in the air, only air is used as an insulator. Air is an insulator. In this case, you may have to give up some advantages of the PC board structure, but this advantage is sometimes worthy of using points in the air. See Figure 33.
Bias current test
The test method in FIG. 34 is applicable to a bench test bias current with reasonable accuracy. To understand its working principle, first temporarily turn off the switch S2. When S2 opens,
The capacitor suitable for C2 should be 5 PF or 10 PF Yinyun Mother, NPO ceramics or air media.when?In determining the size of I-, the leakage of capacitors and sockets must be considered.The switching S2 should keep short circuit most of the time, otherwise the dielectric absorption of the capacitor C2 may cause errors.Similarly, if S1 is short -circuited in an instant (and S2 short circuit)
Among them, CX is a messy capacitor of+input.
Typical single power supply application- (V+ 5.0 VDC)
Note: Applying 5V bias on the photoelectric diode can reduce its capacitance by 2 to 2 to 2 to 2 to3 times, thereby increasing response and reducing noise.However, this partial pressure on the optoelectronics diode will lead to leakage of photoelectric diode (also known as dark current)