Features

± 3 A output current

Wide power supply voltage range: 4.5 v —26 v

high Efficiency generates less heat

multiple switch frequencies

- Main/Corporation synchronization

- The switch frequency is as high as 1.2 MHz

#8226; The feedback power level with high PSRR reduces the PSU requirements

reduce the number of components for single power

Integrated self -protection circuit, including overvoltage, owed owed, owed owed Pressure, overheating and short circuit, and providing error reports

thermal enhancement component

-dap (32 stitch HTSSOP PAD DOWN)

—40 ° C to 85 ° C's ambient temperature range

Application

Power Line Communication (PLC) driver

TEC driver (TEC) driver (TEC) driver (TEC) driver

Laser diode partial pressure

motor drive

servo amplifier

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DRV595

is a highly efficient, large current power drive, which is very suitable for various loads in the system of 4.5V to 26V. PWM operations and low output -level lead resistance can significantly reduce the power consumption of the amplifier.

DRV595 advanced oscillator/PLL circuit adopts multiple switch frequency options; this is implemented with the main/from options, making it possible to synchronize multiple devices.

DRV595 has short circuit, heat, overvoltage and pressure protection function, which can prevent faults. The failure is reported to the processor to prevent the device from being damaged under overload.

Simplified application circuits System frame diagram

Typical features

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Precautions for the output filter

DRV595 can be used to drive TEC components. There are two feedback circuits for typical circuits for this application-one for constant current, the other for monitoring temperature, and providing a constant temperature that keeps the laser diode. The error placed is used to combine two feedback circuits, as well as control signals from the system. The output of the error release was then sent to the DRV595.

You need to use an output filter to prevent excessive ripples from reaching the TEC component. Some TEC components may be damaged by ripples; the TEC specifies the design filter to reduce switch waveforms to prevent TeC from damaging. The filter can also reduce the electrical noise volume of coupling to the TEC component.

For most applications, a second -order Batworth low -pass filter, the deadline is set to thousands of Hertz. The filter examples of Formula 2, Formula 3, and Formula 4 are shown in Figure 12.

Second -order Batworth LPF transmission function

Use semi -circuit analysis

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Equipment Information

Typical Application

In order to ensure normal work when power is powered, PVCC and After AVCC stable, wait for 10ms, and then use analog input, in -and in+. Figure 14 shows this sequence.

(1), Note: The sequential relationship between PVCC assertion and AVCC assertion is not important.

gain settings and main/from

DRV595's gain from the sorter settings of the gain/SLV control pin. Master or from the mode is also controlled by the same pin. Internal ADC is used to detect 4 input states. The first four states set the DRV595 as the main mode, and the gain is 20, 26, 32, and 36 dB; the latter four states set the DRV595 to the mode, and the gain is 20, 26, 32, and 36 dB, respectively. The gain is locked during the power -on period, and it cannot be changed when the device is powered on. Table 1 shows the recommended resistance value of each mode and gain combination:

In the main mode, the synchronous terminal is output. In the mode, the synchronization terminal is the clock input input of. TTL logic level that conforms to GVDD.

Input impedance

DRV595 input level is a full differential input level. The input impedance changes with the change of gain settings. The gain is 9 k #8486 at 36 dB; It is 60 k . Table 1 lists the value from minimal gain to maximum gain. The tolerance of the input resistance value is ± 20%, so the minimum value will be higher than 7.2 k

Starting/off operation

DRV595 adopts a turnover operation mode, which aims to reduce the power current (ICC) to the absolute minimum level, at no time, no, no Under energy conservation. When the amplifier is in use, during normal operation, SDZThe input terminal should be kept at a high position (see the trigger point specification table). Pulling SDZ will output the output to Hi-Z, and the amplifier enters the low-current state. It is not recommended to keep the SDZ disconnect because the operation of the amplifier is unpredictable.

GVDD supply

GVDD power supply is used to power the gate for output full bridge transistors. It can also be used to power the gain/SLV pressurizer. Use X5R ceramic 1 μF capacitors to disconnect GVDD and GND. The GVDD power supply is not intended to be used as an external power supply. It is recommended to use the resistor division to limit the current consumption to obtain 100 k or higher gain/SLV.

BSP and BSN capacitors

Only NMOS transistors are used in the output stage of the whole H bridge. Therefore, they need to guide each output of the high -voltage side of the capacitor to open correctly. It must be connected from each output to the corresponding self -lifting input. The mass is X5R or a higher 220 NF ceramic capacitor, and the rated voltage is at least 16 V. (See the application circuit diagram in FIG. 13).) The self -lifting capacitor connected between the BSX tube and the corresponding output tube foot is used as a floating power supply for high -side N -channel power MOSFET grille drive circuits. In each high -voltage side switch cycle, the self -raising capacitor keeps the grid to the source pole voltage at a high level to keep the high -sides MOSFET.

Differential or single -ended input

The differential input level of the amplifier can eliminate any noise appearing on the two input lines of the channel. To use the DRV595 with different sources, connect the positive leader of the signal source to the in+input terminal, and connect the negative vaginal cadder of the signal source to the IN -input terminal. To use the DRV595 and single-end power supply, use the sigmaker to insert the IN-deviation to 3.0V, and apply the single-end signal to IN+.

Equipment protection system

DRV595 contains a complete protection circuit. After careful design, the system design is efficient and protects the equipment from short -circuit, overload, overheating and under pressure. Permanent failure. If the error is detected according to the following fault table, the FAULTZ pin will send a signal:

Short -circuit protection and automatic recovery function

DRV595 has a short -circuit of output level caused Over -current protection. Short -circuit protection faults are reported in a low state on the FaultZ pin. When the short -circuit lock is connected, the amplifier output is switched to a high impedance state. You can remove the lock through the low state through the cycle SDZ pin.

If you need to automatically recover from the short -circuit protection 闩 lock, please directly connect the FaultZ pin directly to the SDZ pin. This allows the FaultZ pin function to automatically drive the SDZ pin low level, thereby removing short -circuit protection 闩 locks.

Heat protection

When the temperature of the internal mold exceeds 150 ° C, the heat protection on the DRV595 can prevent the device from being damaged. From the device to the device, the trip point has a tolerance of ± 15 ° C. Once the mold temperature exceeds the thermal trigger point, the device enters the shutdown state, and the output is disabled. This is a lock failure.

The heat protection fault reported on the FAULTZ terminal as a low state.

If you need to restore it automatically from the thermal protection 闩 lock, please directly connect the FaultZ pin to the SDZ pin. This allows the FaultZ pin function to automatically drive the SDZ pin low level, thereby removing the heat protection lock.

DRV595 modulation scheme

DRV595 can choose to run under BD modulation or 1SPW modulation; this is set by the Modsel pin.

MODSEL u003d GND: BD modulation

This is a modulation scheme that allows a smaller ripple current that allows the TEC load. Each output is switched from 0 volts to the power supply voltage. Without the input, the output end and the output end are the same, so there is only a small current or no current in the load. For the positive output voltage, OUTP's duty cycle ratio is greater than 50%, and OUTN is less than 50%. For the negative output voltage, OUTP's duty cycle ratio is less than 50%, and OUTN is greater than 50%. During the entire switch, the voltage on the load remained at 0V, reducing the switching current, thereby reducing any I2R loss in the load.

MODSEL u003d High: 1SPW modulation

1SPW mode changes the conventional modulation method to obtain higher efficiency, the ripple current decreases slightly. And more attention is required in the selection of output filters. In the 1SPW mode, the output is about 15%of the modulation in an idle state. When the input signal is applied, an output decreases, one increases. The reduced output signal is quickly track to GND. At this time, all the modulation occurs through rising output. As a result, only one output is a switch. Due to the reduction of switching loss, the efficiency of this model has been improved. Every time the output is grounded, the output signal generated by each semi -output end is discontinuous. This may cause a bell in the output filter, unless it is particularly careful when selecting filter components and the type of filter used.

Power consumption and maximum ambient temperature

Although DRV595 is much more efficient than traditional linear solutions, the power drop on the output transistor resistance is indeed true. Some heat is generated in the packaging, which can be calculated through Formula 5:

For example, at the maximum output current of 3A, the total power of the power power is 60 m (tj u003d 25 ° C ), The power consumed in the package is 1.1 W.

Use Formula 6 to calculate the highest ambient temperature:

Print circuit board (PCB layout) When planning the layout of the printing circuit board, you must be careful.The following suggestions will help meet EMC requirements. decoupled capacitor-high-frequency counter-coupled electric container should be as close to PVCC and AVCC terminals as possible.Large (100 μF or higher) large -capacity power supply container should be placed near the DRV595 on the PVCC power supply.Local high -frequency edge capacitors should be as close to PVCC pins as possible.These lids can be directly connected to the IC GND pad to obtain a good grounding connection.Consider adding a small, high -quality low ESR ceramic capacitor to the PVCC connection at both ends of the chip, and a larger intermediate frequency electric container between 100 NF and 1 μF. The quality of these capacitors is also very good. ground-PVCC off-coupled power container should be connected to GND.All grounding should be connected to IC GND, which is applied to the central ground or star ground for DRV595.