Features

programmable function -single pole/bipolar conversion -differential/single -end multi -road repeat device

configuration

Sample and save

[

[

123] Single power supply 5V, 10V or ± 5V operations

Direct 3 or 4 -line interfaces to most MPU serial

Portal I/O port

] Simulation input co -mode power rail

Resolution: 10 digits

The total unsettled error (A -level): ± 1LSB ultra -temperature

Quick conversion time: 20μs [123 [123 ] Low power current

LTC1091 : The maximum 3.5mA, typical 1.5ma LTC1092

/

LTC1093
// LTC1094: maximum 2.5mA, typical 1MA

Description

LTC #174; 1091/LTC1092/LTC1093/LTC1094 10 -bit data collection system aims to provide digitalization from various signal sources from various signal sources Simulation data and sensors. Built -in 10 -bit switch capacitors, approaching the A/D core one by one. These devices include software configured simulated multi -path relics and dual -pole and single -pole conversion modes, as well as samples and maintenance. The serial port on the film allows efficient data to transmit to various microprocessors and microcontrollers. These circuits can provide a complete data acquisition system in the ratio measurement application, which can also be with other people's external references. High -impedance simulation input and direct connection applications of many sensors and sensors under the reduction of the range (below 1V), without the need to gain level. An efficient serial port does not require external hardware to most MPU serial ports and all MPU parallel I/O ports allowing eight channels to transmit only three wires. Coupled with low power consumption, remote positioning is possible, and it is convenient to transmit data through isolation barrier. The temperature drifting of the offset, linear and full marking errors is extremely low (usually 1ppm/° C), allowing all specified sloping deviations and linear errors to maximize ± 0.5LSB. In addition, the A -slope device specifies the full marking error and the total error of the total error (including the maximum impact of offset and linearity to the maximum ultra -temperature ± 1LSB. The lower level of the lower level is ± 2LSB suitable for full volume or less discerning. .

absolute value (Note 1, 2)

Power supply voltage (VCC) ground or V-12 volts

negative power voltage (V-) — 6V grounded [123

]

Voltage

Simten to reference and LTC1091/2 CS

Input (V-)-0.3V to (VCC+0.3V)

Digital input (except LTC1091/2 CS) – 0.3 to 12 volts

Digital output -0.3v to (VCC+0.3V)

Power consumption 500 MW [ 123]

Work temperature range

LTC1091/2/3/4ac, LTC1091/2/3/4C – 40 ° C to 85 ° C

Storage temperature range –65 ° C To 150 ° C

Lead temperature (welding, 10 seconds) 300 degrees Celsius

converter and multi -way relics characteristics

indicate specifications suitable for the entire working temperature range Otherwise, the specifications are TA 25 ° C. (Note 3)

Exchange features

indicate the specifications suitable for the entire working temperature range, otherwise the specifications are TA 25 ° C. (Note 3)

Digital DC electrical circuit breaker

indicates the specifications suitable for the entire working temperature range, otherwise the specifications are TA 25 ° C. (Note 3)

Note 1: The absolute maximum rated value means that the value device that exceeds life may be damaged.

Note 2: All voltage values are connected together with DGND, AGND and, GND and Ref -(unless otherwise explained). Ref -Agnd pins connected to the LTC1093 inside. DGND, agng, Ref-and V-internal connection to GND pins on LTC1091/LTC1092.

Note 3: VCC 5V, VREF+ 5V, VREF - 0V, V - 0V, single pole mode and -5V, bipolar mode, clk 0.5MHz, unless there are other regulations.

Note 4: These specifications are suitable for monocular (LTC1091/LTC1092/LTC1093/LTC1094) and dual -pole (only LTC1093/LTC1094) mode. In the bipolar mode, a LSB is equal to the dual -pole input range (2VREF) divided by 1024. For example, when VREF 5V, 1LSB (double pole) 2 (5V)/1024 9.77mv.

Note 5: Linear error refers to the A/D conversion curve.

Note 6: The total number of unjust errors includes offset, full margin, linearity, multi -road repeat device and keeping step errors.

Note 7: The diode connects to each reference and analog input on the two films. It will transmit a diode as a reference or analog input voltage below V -or VCC. There is a diode drop. Be careful of VCC levels (4.5V) at low voltage, as a high -level reference orThe simulation input (5V) can cause the transmission of this input diode, especially at high temperatures, and causes input errors close to the full standard. This specification allows 50mv positive bias to be at any diode. This means that as long as the reference or simulation input does not exceed 50mV of the power supply voltage, the output code is right. Therefore, the input voltage range with an absolute 0 to 5 volts requires minimum power supply voltage exceeding the initial tolerance of 4.950V, and temperature changes and loads.

Note 8: Channel leakage current measured after the channel selection

Typical performance features

The maximum frequency operation (50%duty -occupying ratio) is the device that receives DOUT data.

2. When the CLK frequency decreases from 500kHz, the minimum CLK frequency ( #8710; error ≤0.1LSB) represents any code conversion that first detects its 500kHz value.

1. With the increase of the CLK frequency and source resistance, the maximum CLK frequency ( #8710; error ≤0.1LSB) represents the frequency of 0.1LSB from any code of 500kHz of 500kHz In the conversion, the value of 0

2. The maximum RFILTER represents the filter resistance value when 0.1LSB is first detected that the full marking error is detected at the time of the full marking error at rfilter 0.

CS (pin 1): chip select input. The logic of this input enables LTC1091/LTC1092.

CH0, CH1/+in, --in (pin 2, 3): Simulation input. These must be no noise for GND.

GND (pin 4): Sims ground. GND should be tightened to simulate the ground plane.

din (pin 5) (LTC1091): Digital data input. Multi -way reused address is transferred to this input.

VREF (pin 5) (LTC1092): Reference input. References Enter the range of A/D converter, and must keep no noise about AGND.

DOUT (pin 6): digital data output. The A/D conversion results will be moved out of this output.

CLK (pin 7): shift clock. This clock synchronizes serial data transmission.

VCC (VREF) (pin 8) (LTC1091): Positive power and reference voltage. This pin provides a range of A/D converter. Must be noisy to generate ripples by directly bypass to simulation ground plane.

VCC (pin 8) (LTC1092): Positive power voltage. This unnecessary is A/D conversionThe device provides a power supply. It must keep freedom to eliminate noise and ripple ground plane through direct bypass to the simulation circuit.

LTC1093/LTC1094

CH0 to CH5/CH0 to CH7 (inserted 1 to 6/inserted 1 to 8): Simulation input. Simulation input must be no noise

COM (pin 7/pin 9): GM. Public pipe foot defines zero reference point for all single -end input. There must be no noise, usually connected to the ground floor.

DGND (pin 8/pin 10): Digital grounding. This is the internal logic on the ground. Tied to the ground plane.

v - (needle pin 9/needle foot 11): negative power supply. Article 5-to the negative potential in the MOST circuit. (Single power supply ground application.)

agng (pin 10/pin 12): Simten ground. Agng should be directly connected to the simulation ground.

VREF (pin 11) (LTC1093): Reference input. References input must maintain noise related to AGND.

Ref+, Ref - (pin 13, 14) (LTC1094): Reference input. Reference input must maintain no noise

din (inserted 12/insert 15): Data input. The A/D configuration word is transferred to this input.

DOUT (pin 13/pin 16): Digital data output. A/D Con Version results will be removed from this output.

CS (pin 14/pin 17): chip select input. A low logic input enables LTC1093/LTC1094.

CLK (pin 15/pin 18): shift clock. This clock is a synchronous serial data transmission.

VCC (pin 16) (LTC1093): Positive power supply. This supply must keep noise and ripples to simulate the ground plane by directly bypass.

AVCC, DVCC (pin 19, 20) (LTC1094): Positive power. This power supply must keep noise and ripple directly bypass the simulation ground plane. AVCC and DVCC should be connected to LTC1094.

ATIO application

LTC1091/LTC1092/LTC1093/LTC1094 is a Data

The acquisition component containing the following functional blocks:

1.10 bits approach A/D converter one by one

2. Simulate multi -road releasing device

3. Sample and keep (s/h)

4. Synchronous, semi -duplex serial interface

5. Control and time logic

Digital consideration

Serial interface

1.LTC1091/ LTC1093/LTC1094 and microprocessors and other external circuits use 3 -line interfaces (see operation order) through synchronization, half -dual -workers, 4 -line serial interface LTC1092. The clock (CLK) and each drill are transmitted and captured on the upper system of the transmitting and receiving rising edge of the clock. LTC1091/LTC1093/LTC1094 receives the input data for the first time, and then transmits back the A/D conversion result (half dual). Because of the half -duplex operation, DIN and DOUT can be connected together to allow transmission to only three wires: CS, CLK, and DATA (DIN/DOUT). Data transmission starts by a decreased chip selection (CS) signal. After the CS decreases, the LTC1091/LTC1093/LTC1094 will find the starting position. After receiving the starting bit, a 3 -bit input word (6 digits of the LTC1093/LTC1094) was transferred to the input of LTC1091/LTC1093/LTC1094 and then started conversion. After an empty position, the result is converted on the DOUT line. Last data exchange, CS should be improved. This will reset the LTC1091/LTC1093/LTC1094 to prepare the next data exchange. LTC1092 does not need to configure the input word without a DIN pin. The decreased CS start -up data transmission is shown in the operation order of the LTC1092 operation. After CS falls down,

The first CLK pulse enables DOUT. After an empty position, the A/D conversion result is output in DOUT lines. Reset the LTC1092 with CS high to the next data exchange.

2. Enter dataword

LTC1092 does not need DIN characters. It is a permanent configuration to have a single differential input and operation in a single pole mode. The conversion result is output to the DOUT line in the first sequence of MSB, and then the LSB sequence, first provides a simple interface serial port with MSB or LSB. The following description is suitable for the configuration of LTC1091/LTC1093/LTC1094. Enter LTC1091/LTC1093/LTC1094 clock data into the input of the DIN clock ascending edge. The definition of the input data is as follows:

ATIO application

The first ""Logic No. 1"" starting position Enter the starting bit of the DIN input after CS. Starting data transfer. LTC1091/LTC1093/LTC1094 will ignore the front guide zero in front of this logic value. When the position is received, the input word is inputThe remaining position will be punched. Then ignore the further input on the DIN pin until the next CS cycle. MUX configuration requested the conversion after the starting position of the MUX address input word. In order to select a given channel, the converter will measure the voltage between the two channels from+and representative -the symbol in the table below. In a single -end mode, all input channels use GND and LTC1093/LTC1094 on LTC1091.

MSB Priority/LSB Preferring (MSBF)

The output data of LTC1091/LTC1093/LTC1094 is MSB-FIRST or LSB-FIRST sequence sequence Programming, using MSBF bit. When the MSBF bit is a logical bit, the data will appear in DOUT lines in MSB FIRST format. Logic zero will fill the long micro -processor that adapt to the long -term long micro -processor that meets the requirements required by some people after the last data bit. When the MSBF bit is zero, the first data of LSB will be on the Dutex. (See the order of operation).

Single pole/double pole (single pole)

The UNI bit of the LTC1093/LTC1094 determines whether the conversion will be a single or double pole. When UNI is logical, the single -pole conversion will be selected input voltage. When UNI is logical zero, the dual -polarity will be transformed. The figure shows the input range and code allocation of each conversion type. LTC1091/LTC1092 permanent configuration is used for single -pole mode.

3. Can accommodate microprocessors

Different words LTC1091/LTC1093/LTC1094 will fill in unlimited time after the transmission data is not infinitely. After the transmission data is transmitted indefinitely, the data is transmitted indefinitely. After the transmission data is transmitted, the data is transmitted. Until CS becomes higher. Listen to this time to disable the DOUT line. This makes it easier for the interface to increase to the MPU serial port includes 4 bits (such as COP400) and 8 bits (such as SPI and microfil/plustm). Any word can be input by input in LTC1091. Figure 1 shows the words of the LTC1091 input and output of 4 and 8 -bit processors. The complete data exchange can be output with two 4 -bit microprocessors to achieve two inputs in the four systems and two inputs of an 8 -bit output end of the four systems. The final data obtained is aligned left in the microprocessor, and the unused low -level positions that zero LTC1091 are automatically filled. Another example in Section 5 is to use the MC68HC05C4Microwire/Plus as a trademark of National Semiconductor Corp.. A 8 -bit transmission and correct positioning data are adjusted inside the MPU.

4. Operations bundled together with noise and noise LTC1091/LTC1093/LTC1094 can use noise and noiseSound tied together. This eliminates one of the lines to communicate with the microprocessor. Transfer data in two directions on a wire. The processor pin is configured to input or output to the data cable. For example, the LTC1091 will control the data cable and lower it to the CLK EDGE after receiving it to the starting bit during the fourth fall (see Figure 2). Therefore, the processor end lines must be switched to the input before that to avoid conflict. In the next section, an interface examples with DIN and DOUT's LTC1091 are connected to Intel 8051 microprocessors.

5 microprocessor interface LTC1091/LTC1092/LTC1093/LTC1094 CAN interface direct (without external hardware) To the most popular microprocessor (MPU) synchronous serial format (see Table 1). If you use a microprocessor without a dedicated serial port, then three or four MPU parallel ports can be programmed to form a serial link of the LTC1091/

LTC1092/LTC1093/LTC1094. Here is a serial number interface example and a sample programming that displays parallel port to form a serial interface.

Motorola SPI (MC68HC05C4, MC68HC11)

MC68HC05C4 was selected as a microprocessor with a dedicated serial port. This microprocessor transmits data MSB priority and is increasing with 8 bits. There are two 8 -bit transmission, and A/D results are read into microprocessors. For the first time, 8 -bit transmission sent DIN characters to LTC1091 and clock B9 and B8 to input A/D converted results input processors. This second 8 -bit transmission clock remains, B7 to B0, enter the MPU. Add the bytes received by the first MPU with 03 Sixteen inlets to remove six highest effective positions. Note that the starting position in the first MPU sending word is used to locate A/D as a result at the right of the two memory positions.