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2022-09-15 14:32:14
L5993 constant power controller
The current mode control PWM
The switching frequency is as high as 1MHz
The start current low ( lt; 120μA)
The constant output power and switch frequency
Suitable for suitable Large current output drive
Power MOSFET (1A)
full lock PWM logic with dual pulse inhibitory
A programmable duty duty
100% And 50%maximum duty cycle limit
programming soft start
Over -current fault detection and re -launch delay
Pwm UVLO
] Input/output synchronization
Lock disabled
current response internal 100ns cutting edge blank blank
Packaging: DIP16 and SO16N
Instructions
This is this The main controller is a technology developed in BCD60II and has been designed to control the use of fixed frequency current mode. Based on the standard current mode PWM control device, this device has the following characteristics that can be programmed and soft startup, input/output synchronization, disabled (for overvoltage protection and power management), accurate maximum load cycle control, 100NS frontier discharge hidden turnover current detection The ""constant power"" function of the pulse current limitation, over -current protection, soft start intervention, and control of output multi -simultaneous monitor switching power supply.
Electrical features (VCC u003d 15V; TJ u003d 0 to 105 ° C; RT u003d 13.3K ; ct u003d 1NF unless there are other regulations.)
Electrical characteristics (continued)
The constant power function
The pulse voltage restrictions prevent peak values u200bu200b
The current current exceeds the given level. This in turn limits the maximum power of the output. In other words, the performance of the power converter. But the ability depends on the switch frequency: for example, a discontinuous current mode is exciting. They are only proportions. Display switch frequencies in the SMPS of the grating CRT scanning signal with the grating line of the display to increase the antidity. When more and more, the CRT display needs to be in the range of different video frequency (e.g. from 31kHz to 64 kHz), so the number of switching frequency will also change in this range. In some faults, the power throughput may be excessively excessive without having to trip up the pulse current limited circuit high operating frequency. For safety reasons, doing so is the power of the design converterGrade (power MOSFET, transformer, capture diode), so as to withstand maximum power throughput under the fault conditions. However, this is an unsustainable growth of scale and cost. Overcoming this ""constant"" function. The device changes its pulse threshold through the pulse current to maintain its pulse threshold to maintain the power capacity of the reverse transformer although the switching frequency has changed. This is a value of 1 (synchronous) with the value of the error amplifier (VCOMP), which is reduced by the signal frequency of the input pin. The required frequency voltage conversion can achieve this function by maintaining the peak voltage of the circuit detection (synchronous) oscillator with a peak value. Only an external capacitor. It is important to point out the shape of the shape. The duration of the amplitude synchronization pulse is nothing to do with this technique.
Application information
Detailed pin function description
Pin pin 1. Synchronous (input/output synchronization). This function allows IC oscillator to synchronize (or other controllers) external frequency (from). As the main pulse, the pin is passed on the positive pulse of the oscillator (see pin 2). Triggered at the edge of the subordinate operation circuit. Reference is shown in Figure 21. When several IC parallel work does not have the designated needs, because the fastest one automatically becomes the main control. During the rise of the oscillator's slope, the pins were pulled down by the leakage current of the 600 μA. At the edge of the decrease, the pulse is released, and the 600μA is turned off and cut off. The power of a generator is usually 7 mAh (the voltage is still higher than 3.5V). In Figure 20, some practical examples of synchronous L5993 are given. Needle 2. RCT (oscillator). Resistance (RT) and capacitors (CT), as shown in Figure 21, set the operating frequency FOSC of the oscillator. CT is charged through RT until its voltage reaches 3V, and then quickly discharge. As a voltage drop to 1V, start charging again. The frequency can be used in Figure 13 or considering the approximity value relationship:
It and: td #8773; 30 #8901; 10-9+kt #8901; CT (3) TD is also the duration of synchronous pulses
Pink pin 3. DC (duty duty control). Performing this needle -pin voltage between 1 and 3 V is possible to set the maximum duty ratio at 0 and upper limit DX (see pin 15). If DMAX is the maximum duty ratio required, the voltage V3 applied on the pin 3 is: V3 u003d 5-2 (2-DMAX) (4) The internal comparative comparative comparison between the DMAX through the V3 and the oscillator slope (see Figure 22). Therefore, if the device is synchronized with the external frequency FEXT (therefore the oscillator is reduced), (4) becomes:
Correcting the duty cycle. E/A uses high -gain bandwidth products, which can broaden the overall control loop, high conversion rate and current capability, and improve its signal characteristics. Generally, the compensation network that stabilizes the entire control loop is connected between the pin and COMP (pin 6).
Pin pin 6. Comp (error amplifier output). Generally, this pin is used for frequency compensation and related network connections between the two
pin and VFB (pin 5). Since L5993, the compensation network cannot ground E/A is a voltage mode amplifier (low output impedance). For some tests for compensation technology, see the application ideas.
Pinper 7. SS (soft start). When the device starts, connect to this pin and SGND (pin 12) During this period, about 7 volts of slope, E/A output by the voltage of the E/A output is css itself , Until the stable state value given by the control loop. The maximum interval time during the E/A clamping period, the reference soft startup time is about:
Since the system will try to restart each fault cycle, there is no risk of locking. The ""snoring"" causes the system to be controlled to prevent short circuits, but it cannot eliminate the stress of the power element during the period of pulse limit (from A to C). If you can better control overloads, other external protection circuits are required.
Pink pin 8. VCC (controller power supply). This needle provides a signal part of an integrated circuit. The device can be enabled as the VCC voltage exceeding the starting threshold and as long as the voltage is higher than the UVLO, it can work threshold. Otherwise, the device will be closed and the current consumption will be extremely low ( lt; 150 μA). This is the most important contribution to reducing the consumption of the starting circuit (only one resistor), which is the most important contribution to power loss. When the converter is light load. The internal Ziner limits the voltage on the VCC to 25V. If this limit is exceeded, the IC current consumption will increase significantly. A small film capacitor (needle feet 12) between this pin and SGND is as close to the IC as much as possible to filter high -frequency noise.
Pink pin 9. VC (power -level power supply). IT supply the drive of the external switch, so AB absorbs pulse current. Therefore, it is recommended to place a buffer capacitor (toward PGND, needle foot 11, as close as IC as much as possible) to maintain commotion in order to avoid these current pulses. This pin can be connected to the buffer container directly or through the resistor, as shown in Figure 25, control the external speed of the switch MOS switch respectively. During the drive, the gate resistance is RG+RG ', and the AT shutdown is limited to RG.
Pin pin 10. Output (drive output). This pins are the output switch of the external power drive level. Generally, this will be a power MOS, Al, although the power of the driver is enough to drive BJT (1.6A source, 2A exchange, peak). The driver consists of a totem rod and a high -side NPN Dallingon and a low -side VDMOS, so there is no need to clamp the external diode to prevent the voltage from being lower than the ground. The internal clamping is limited to 13V transmission to the gate voltage. Therefore, it can be provided with a higher -voltage drive (pin 9), without any damage to the oxidation layer of an external MOS grid oxide. Piece will not cause the power consumption inside the chip, because door chargeThe peak of the current appears in the gate voltage, and clamping is not positive. Moreover, when the gate voltage is 13V, it is steady.
Pink Power supply). The current circuit is closed through this pin during the discharge of the external gate. This cycle should be as short as possible to reduce electromagnetic interference and operation from the signal current loop.
Pink 12.SGND (Signal grounding). This grounding refers to the control circuit of an integrated circuit. Therefore From flowing through the SGND path.
needle pin 13.isen (current feeling). This needle connect to the current ""heat"" influenza -influenza resistor RSENSE (another ground) to get a voltage slope. It is a switch The image of the current (IQ). When the voltage is equal:
The conductivity of the switch is terminated.
The switching frequency Half of them
For an oscillator, internal T triggers (see square diagrams, Figure 1) are activated. Figure 29 shows the operation. The semi-occupation ratio option accelerates the discharge of the timer capacitor CT (for the duty cycle to be as close to 50%as much as possible), so the frequency of the oscillator-the same RT and CT-will be slightly higher. The reduction of frequency can be used to reduce the requirements that must meet the requirements of energy consumption (such as the display, see ""application ideas"").
needle 16. C-power (constant power function). The external capacitor SGND connected between this pins completes the peak of the peak of the circuit detection. The circuit obtains a DC voltage (with the increase of the synchronous frequency pins 1 (synchronous) ascending) to restrain error amplifiers output (VComp), as shown in the detailed internal schematic diagram of Figure 30. In this way, the frequency of 47K discharge resistance is reduced when the pulse setting point is rising by the movement frequency. External capacitors must be enough to get a real DC voltage on the pin. Considering that the minimum extension capacitance value (CCP) of the resistor internal 47K the 1%ripple of the 1%ripple that is smaller than overlapping on the DC voltage is:
, the #402; min (Hz) is the minimum synchronization frequency.When this function is not used, the pin 16 must be connected directly to the pin 4. Considering the transformer, the circuit is usually not adjusted. No matter how to change the maximum power limit of the switching frequency and/or the power supply voltage, minimize the following or more to minimize the following or more
-Litor inductance;
-D number ratio of transformer turning;
-The induction resistor.
Requires a test process, including the easier to modify parameters. In fact, the combination of specific parameters and DE depends on the range of power voltage and synchronization frequency range.
The additional ""fine -tuning"" can be achieved in the current (13, Isen). For a wide range of power applications, this is the propagation path of the compensation current detection path no matter how to compensate the current detection path (PWM comparator+闩 lock+drive), the circuit is shown in the ""application concept"" part.
Layout Tips
Generally speaking, the correct circuit board layout is critical to the correct operation, but it is not easy. Be careful to place components, correct wiring, and appropriate trace width. If high voltage, it meets the main problems of the isolation distance. L5993 is complicated by using the two pins for separate current bias (SGND) and switch drive current. It will only remind several important issues here.
(1) Return all power signals
(grounding, shielding, etc.) should be wiring separately, and only a single location.
(2) The noise coupling can be limited by the minimized current ring.This is particularly suitable for high pulse circuit water flow.
(3) For the high current path, it should be on the other side of the PCB: this will reduce the two resistance and the induction of the line.
(4) Magnetic field radiation (and mixed inductance) can reduce the switching current as short as possible by retaining all traces.
(5) Generally speaking, the trajectory of carrying signal current should be far away from the traces of the pulse current or the voltage of the voltage.From this view, you should be particularly careful of high impedance points (current influenza input, feedback input, etc.).It may be a good idea on the PCB side and the other with power sources.
(6) Points of some important circuits, such as reference voltage, IC power pins, etc.