XC7K410T-2FB900C_XC7K420T-L2FF901E Introduction

In Victor Peng's view, the big bang of geometric multiples, AI applications from end-to-edge to cloud, and post-Moore's law computing, all of which cannot be satisfied by a single architecture, which will be the three major factors affecting silence and the future of the world trend. The original chip solutions can no longer meet the needs of the company, and there is an urgent need to develop new products, new technologies and new business models. The explosive growth of data places higher and higher demands on computing speed. Moore's Law is slowing down in Greater China, where innovation is growing at a high rate.

In July 2020, U.S. chip giant Analog Devices Inc (ADI) announced that it plans to acquire rival Maxim Integrated Products for $20.9 billion in an all-stock deal to boost its presence in companies including telecommunications. capabilities in multiple industries. It was the largest M&A transaction in the United States at the time and the largest acquisition in ADI's history.

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In fact, 2020 was supposed to be a sluggish year for mergers and acquisitions in the semiconductor market, affected by the new crown epidemic and Sino-US relations. These two transactions have made the global semiconductor landscape go through a new round of mergers and acquisitions and reshuffles. However, in the third quarter, the demand for the semiconductor market has recovered significantly, and the cost expenditure has increased, and a new wave of mergers and acquisitions has emerged. In the first quarter of this year, the value of semiconductor M&A transactions was $1.8 billion, and it only reached $165 million in the second quarter. According to the report data released by IC Insights, a third-party analysis agency on September 29, the total value of global semiconductor mergers and acquisitions soared to US$63.1 billion in the first nine months of 2020, of which the two transactions of Nvidia-Arm and ADI-Maxim accounted for about 97% of total M&A in 2020. If AMD reaches an acquisition agreement with Xilinx, the value of semiconductor M&A transactions in 2020 may also rise to $93.1 billion, making it the third largest merger and acquisition year in the history of the semiconductor industry.

Xilinx Vitis™ is a free, open-source development platform that encapsulates hardware modules into software-callable functions, while being compatible with standard development environments, tools, and open-source libraries. It automatically adapts to Xilinx hardware based on software and algorithms without VHDL or Verilog expertise.

Today, Xilinx's rich and powerful platform supports 70% of new developments, leading the way in FPGA-based system design. Softnautics chose Xilinx technology to implement this solution because it integrates both the Vitis™ AI stack and powerful hardware capabilities.

Softnautics took the Xilinx Vitis AI stack and used the software to provide acceleration to develop hybrid applications while implementing LSTM functionality for efficient sequence prediction by porting/migrating TensorFlow-lite to ARM. Image pre-processing/post-processing is implemented by Vivado using HLS, while Vitis's role is to perform inference using Connected Text Proposal Network (CTPN). It runs on the processing side (PS) using the N2Cube software. Ultimately, Softnautics uses the solution for real-time scene text detection in video pipelines and uses a robust dataset to refine the model.

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Another optimization of IplImage for images is the variable origin, to compensate for this, OpenCV allows users to define their own origin settings. In the OpenCV type relationship, we can say that the IplImage type inherits from the CvMat type, and of course other variables are included to parse it into image data. The IplImage type has many more parameters than CvMat, such as depth and nChannels.

Finally, the functions in the rewritten OpenCV design are replaced with video functions of the corresponding functions provided by HLS, and synthesized using VivadoHLS, implemented in FPGA programmable logic or as a Zynq SoC hardware accelerator under the Xilinx development environment. We use the example of fast corners to illustrate the process of implementing OpenCV with VivadoHLS. First, develop an OpenCV-based fast corner algorithm design and validate this algorithm using OpenCV-based test-inspired simulations. Of course, these synthesizable codes can also run on a processor or ARM. Next, establish the OpenCV processing algorithm based on the video data stream chain, and rewrite the usual design of the previous OpenCV. This rewrite is to be the same as the HLS video library processing mechanism, which is convenient for the function replacement in the following steps.