XA Spartan-3A DSP_XC6VLX365T-2FF1759I Introduction

The accelerated computing of CPU+GPU+FPGA is undoubtedly aimed at the blue ocean of the data center field. Intel has repeatedly stated that it is a data-centric company, while NVIDIA has recently proposed acquisitions and released various The determination to "take the high ground" is constantly revealed in new products….

Lowering the temperature also increases the reliability of the chip exponentially. Lowering the temperature by 20°C can reduce leakage power consumption by more than 25%. Voltage and temperature control As shown in Figure 1, reducing both voltage and temperature can significantly reduce leakage current. By changing the power supply configuration, it is easy to adjust the supply voltage. Current FPGAs do not support wide-range voltage scaling, and the recommended voltage range is typically ±5%. Junction temperature can be reduced with cooling schemes such as heat sinks and airflow. Studies have shown that a 20°C reduction in temperature can increase the overall life of the chip by a factor of 10. A 5% reduction in supply voltage can reduce power consumption by 10%.

XA Spartan-3A DSP_XC6VLX365T-2FF1759I

XC7K325T-1FFG900I

The power consumption of the multipliers in the DSP block is less than 20% of the power consumption of the multipliers built in the FPGA fabric. The dynamic power problem is solved with low-capacitance circuits and custom modules. Given the wide range of leakage current distributions that can result from manufacturing variations, low leakage current devices can be screened to effectively provide devices with core leakage power consumption below 60%. To reduce static power dissipation, longer-channel and higher-threshold transistors are also used across the board. A variety of power-driven design techniques are used in the design of FPGAs. Taking the Xilinx Virtex series as an example, because the configuration memory cells can occupy 1/3 of the number of transistors in the FPGA, a low leakage current "midox" transistor is used in this series to reduce the leakage current of the memory cells.

Softnautics chose Xilinx technology to implement this solution because it integrates both the Vitis™ AI stack and powerful hardware capabilities. Today, Xilinx's rich and powerful platform supports 70% of new developments, leading the way in FPGA-based system design. .

Text is one of mankind's most intelligent and influential creations. The rich and precise high-level semantics contained in text can help us understand the world around us and be used to build autonomous solutions that can be deployed in real-world environments. Therefore, automatic text reading in natural environments, also known as scene text detection/recognition or Photo OCR (Optical Character Recognition), has become a research topic of increasing interest and importance in the field of computer vision.

If AMD reaches an acquisition agreement with Xilinx, the value of semiconductor M&A transactions in 2020 may also rise to $93.1 billion, making it the third largest merger and acquisition year in the history of the semiconductor industry. In fact, 2020 was supposed to be a sluggish year for mergers and acquisitions in the semiconductor market, affected by the new crown epidemic and Sino-US relations. These two transactions have made the global semiconductor landscape go through a new round of mergers and acquisitions and reshuffles. According to the report data released by IC Insights, a third-party analysis agency on September 29, the total value of global semiconductor mergers and acquisitions soared to US$63.1 billion in the first nine months of 2020, of which the two transactions of Nvidia-Arm and ADI-Maxim accounted for about 97% of total M&A in 2020. In the first quarter of this year, the value of semiconductor M&A transactions was $1.8 billion, and it only reached $165 million in the second quarter. However, in the third quarter, the demand for the semiconductor market has recovered significantly, and the cost expenditure has increased, and a new wave of mergers and acquisitions has emerged.

XA Spartan-3A DSP_XC6VLX365T-2FF1759I

XC5VSX95T-3FFG1136C

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XA Spartan-3A DSP_XC6VLX365T-2FF1759I

FPGA power consumption is design-dependent, that is, depends on device family, clock frequency, toggle rate, and resource utilization. Taking Xilinx Spartan-3 XC3S1000 FPGA as an example, assume that the clock frequency is 100MHz, the inversion rate is 12.5%, and the resource utilization rate is the typical value of various actual design benchmarks. Let's analyze the decomposition of the total power consumption of the FPGA in order to understand the main power consumption.

While the CvMat and IplImage types are more focused on "images", OpenCV is optimized for image operations (scaling, single-channel extraction, image thresholding, etc.) The common data containers related to image operations in OpenCV are Mat, CvMat and IplImage. These three types can represent and display images. However, the Mat type focuses on calculation and is highly mathematical.