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2022-09-24 14:15:06
IP101GRR/IP101GA/IP101GRI
IP101GRR/IP101GA/IP101GRI
The IP101G is an IEEE 802.3/802.3u compliant single port Fast Ethernet transceiver capable of simultaneous 100Mbps and 10Mbps operation. It supports Auto MDI/MDIX function to simplify network installation and reduce system maintenance cost. To improve system performance, the IP101G provides a hardware interrupt pin to indicate link, speed and duplex status changes. IP101G provides Media Independent Interface (MII) or Reduced Media Independent Interface (RMII) to interface with different types of 10/100Mbps Media Access Controllers (MAC).
The IP101G is designed to use Category 5 unshielded twisted pair cable or fiber optic cable connected to other LAN equipment. Supports connection with external 100Base-FX optical transceiver using PECL interface. With good performance, reliability, rich power saving methods and extremely low operating current, the IP101G provides system designers with a serial tool to easily complete their projects. They are system debug assistant tools and EMI management tools.
Manufactured in advanced CMOS (85nm) technology, the IP101G is designed based on IC Plus' fifth Ethernet PHY architecture, a feature that enables the IP101G to consume very low power. For example in full load operation (100Mbps_FDX) it consumes less than 0.15W.
IP101GA/IP101GR & IP101GRI are available in 48LQFP/32QFN lead-free packages.
Features:
10/100Mbps IEEE 802.3/802.3u Compatible Fast Ethernet Transceiver
Support 100Base-TX/FX media interface
Support MII/RMII interface
Support automatic MDI/MDIX function
Power management tools
APS, automatic power saving when power off
802.3az, a protocol-based way to save energy
WOL+, saves traffic
PWD, energy saving and power saving
Support MII with LPI for RX and TX
Support RMII with LPI via RX
Support RMII with LPI via RX
Supports baseline drift compensation
Support interrupt function
Built-in synchronous FIFO to support jumbo frame size up to 12KB in MII mode (10KB in RMII 100Mbps mode)
Support MDC and MDIO to communicate with MAC
EMI management tools
Firmware-Based Control
Level 4 for mapping different layout lengths on the PCB
3.3V single power supply
Built-in Vcore regulator
DSP-based PHY transceiver technology
System debugging assistant tool
16-bit RX counter
9-bit RXError/CRC counter
Isolated MII/RMII
receive send echo
Loopback MII/RMII
Use 25MHz crystal/oscillator or 50MHz oscillator REF_CLK as clock source
Built-in 49.9ohm resistor simplifies BOM
Flexible LED Display
Process: 85nm
Package and Operating Temperature
IP101G: Dice, 0~70°C
IP101GA: 48LQFP, 0~70°C
IP101GR: 32QFN, 0~70°C
IP101GRI: 32QFN, -40 to 85°C
